Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2002-09-18
2004-02-10
Chang, Daniel D. (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S027000, C326S083000, C327S332000
Reexamination Certificate
active
06690199
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related to input/output (“I/O”) circuits and, more particularly, to methods and systems for sensing load conditions and for adjusting output current drive according to the sensed load conditions to maintain one or more signal characteristics within a desired range.
2. Background Art
Input/Output (“I/O”) circuits need to interface with different loads. Loads can vary from, for example, 50 pF-600 pF. Load variations can affect signal characteristics, such as rise and/or fall times. For example, loads with lower impedances tend to drain current faster from I/O circuits, which tends to decrease rise and fall times.
In many situations, signal characteristics, such as rise and/or fall times, need to be within a specified range. For example, certain interface standards, such as USB and PCI, require rise/fall times to be within a specified range.
What are needed are methods and systems for sensing load conditions and for adjusting output current drive as necessary to maintain one or more desired signal characteristics.
BRIEF SUMMARY OF THE INVENTION
The present invention is directed to methods and systems for sensing load conditions and for adjusting output current drive according to the sensed load conditions to maintain one or more signal characteristics within a desired range. In an embodiment, load conditions are sensed by monitoring one or more signal characteristics that are affected by load conditions, such as voltage changes with respect to time. Output current drive is then adjusted as needed to maintain the one or more desired signal characteristics.
In accordance with an aspect of the invention, a primary output current is generated in response to a received data signal. The primary output current is provided as an output signal to an output node. The output signal is then monitored for load conditions. For example in an embodiment, slopes of rising and/or falling edge of the output signal are monitored. Slopes of rising and/or falling edges of the output signal can be monitored by, for example, measuring changes in voltage over time (i.e., dV/dt) in the output signal. dV/dt can be measured by coupling a capacitance to the output node, generating a current with the capacitance, and generating a voltage from the current. The voltage is generally proportional to the dV/dt. Depending upon the load conditions, a supplemental current is generated and/or adjusted and added to the primary output current to maintain the desired signal characteristics within a desired range. For example, where dV/dt is monitored, the supplemental current is generated and/or adjusted to maintain the dV/dt within a desired range. In this way, the desired signal characteristic(s) are substantially maintained within the desired range for a range of load values. The invention may be implemented to maintain one or more signal characteristics over a range of load values. For example, the invention may be implemented to maintain one or more signal characteristics over a load range of 50 pF to 600 pF.
The invention may be implemented to sense and maintain signal characteristics only during rising and falling edges. The invention may be implemented to separately sense and maintain signal characteristics for rising and falling edges of the output signal. This tends to simplify circuit designs.
Example circuit diagrams are provided for implementing various aspects of the invention.
Further features and advantages of the invention, as well as the structure and operation of various embodiments of the invention, are described in detail below with reference to the accompanying drawings. It is noted that the invention is not limited to the specific embodiments described herein. Such embodiments are presented herein for illustrative purposes only. Additional embodiments will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein.
REFERENCES:
patent: 5153457 (1992-10-01), Martin et al.
patent: 6545503 (2003-04-01), Tomasini et al.
patent: 1 091 492 (2001-04-01), None
Broadcom Corporation
Chang Daniel D.
Sterne Kessler Goldstein & Fox P.L.L.C.
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