Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2003-01-27
2004-10-26
Auduong, Gene N. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S158000, C365S189070
Reexamination Certificate
active
06809976
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a non-volatile semiconductor memory device. More particularly, the present invention relates to a non-volatile semiconductor memory device including a reference cell which is compared with a selected memory cell in read operation.
2. Description of the Background Art
An MRAM (Magnetic Random Access Memory) device has attracted attention as a memory device capable of non-volatile data storage with low power consumption. The MRAM device is a non-volatile memory device capable of non-volatile data storage using a plurality of thin film magnetic elements formed in a semiconductor integrated circuit and also capable of random access to each thin film magnetic element.
In particular, recent announcement shows that the use of thin film magnetic elements having a magnetic tunnel junction (MTJ) as memory cells significantly improves performance of the MRAM device. The MRAM device including memory cells having a magnetic tunnel junction is disclosed in technical documents such as “A 10 ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC Digest of Technical Papers, TA7.2, February 2000, “Nonvolatile RAM based on Magnetic Tunnel Junction Elements”, ISSCC Digest of Technical Papers, TA7.3, February 2000, and “A 256kb 3.0V 1T1MTJ Nonvolatile Magnetoresistive RAM”, ISSCC Digest of Technical Papers, TA7.6, February 2001.
FIG. 18
schematically shows the structure of a memory cell having a magnetic tunnel junction (hereinafter, sometimes simply referred to as “MTJ memory cell”).
Referring to
FIG. 18
, the MTJ memory cell includes a tunneling magneto-resistance element TMR and an access transistor ATR. Tunneling magneto-resistance element TMR has an electric resistance varying according to a magnetically written storage data level. Access transistor ATR is connected in series with tunneling magneto-resistance element TMR between a bit line BL and a source voltage line SL. Typically, a field effect transistor formed on a semiconductor substrate is used as access transistor ATR.
A bit line BL, a write digit line WDL, a word line WL and a source voltage line SL are provided for the MTJ memory cell. Bit line BL and write digit line WDL allow data write currents of different directions to flow therethrough in write operation, respectively. Word line WL is used to conduct read operation. Source voltage line SL pulls down tunneling magneto-resistance element TMR to a ground voltage GND in read operation. In read operation, tunneling magneto-resistance element TMR is electrically coupled between source voltage line SL and bit line BL in response to turning-ON of access transistor ATR.
FIG. 19
is a conceptual diagram illustrating write operation to the MTJ memory cell.
Referring to
FIG. 19
, tunneling magneto-resistance element TMR has a ferromagnetic material layer FL having a fixed magnetization direction (hereinafter, sometimes simply referred to as “fixed magnetic layer”), and a ferromagnetic material layer VL that is magnetized in the direction corresponding to an external magnetic field (hereinafter, sometimes simply referred to as “free magnetic layer”). A tunneling barrier (tunneling film) TB is interposed between fixed magnetic layer FL and free magnetic layer VL. Tunneling barrier TB is formed from an insulator film. Free magnetic layer VL is magnetized either in the same direction as or in the opposite direction to that of fixed magnetic layer FL according to a write data level. Fixed magnetic layer FL, tunneling barrier TB and free magnetic layer VL form a magnetic tunnel junction.
The electric resistance of tunneling magneto-resistance element TMR varies according to the relation between the respective magnetization directions of fixed magnetic layer FL and free magnetic layer VL. More specifically, the electric resistance of tunneling magneto-resistance element TMR has a minimum value Rmin when fixed magnetic layer FL and free magnetic layer VL have the same (parallel) magnetization direction, and has a maximum value Rmax when they have opposite (antiparallel) magnetization directions.
In write operation, word line WL is inactivated and access transistor ATR is turned OFF. In this state, a data write current for magnetizing free magnetic layer VL is applied to each of bit line BL and write digit line WDL in a direction corresponding to the write data level.
FIG. 20
is a conceptual diagram showing the relation between the data write current and the magnetization direction of the tunneling magneto-resistance element in write operation.
Referring to
FIG. 20
, the abscissa H(EA) indicates a magnetic field which is applied to free magnetic layer VL of tunneling magneto-resistance element TMR in the easy-axis (EA) direction. The ordinate H(HA) indicates a magnetic field which is applied to free magnetic layer VL in the hard-axis (HA) direction. Magnetic fields H(EA), H(HA) respectively correspond to two magnetic fields produced by the currents flowing through bit line BL and write digit line WDL.
In the MTJ memory cell, fixed magnetic layer FL is magnetized in the fixed direction along the easy axis of free magnetic layer VL. Free magnetic layer VL is magnetized either in the direction parallel or antiparallel (opposite) to that of fixed magnetic layer FL along the easy axis according to the storage data level (“1” and “0”). The MTJ memory cell is thus capable of storing 1-bit data (“1” and “0”) according to the two magnetization directions of free magnetic layer VL.
The magnetization direction of free magnetic layer VL can be rewritten only when the sum of the applied magnetic fields H(EA) and H(HA) reaches the region outside the asteroid characteristic line in FIG.
20
. In other words, the magnetization direction. of free magnetic layer VL does not change if the strength of an applied data write magnetic field corresponds to the region inside the asteroid characteristic line.
As shown by the asteroid characteristic line, applying a magnetic field of the hard-axis direction to free magnetic layer VL enables reduction in a magnetization threshold value required to change the magnetization direction along the easy axis.
When the operation point of write operation is designed as in the example of
FIG. 20
, a data write magnetic field of the easy-axis direction is designed to have a strength H
WR
in the MTJ memory cell to be written. In other words, a data write current to be applied to bit line BL or write digit line WDL is designed to produce the data write magnetic field H
WR
. In general, data write magnetic field H
WR
is given by the sum of a switching magnetic field H
SW
required to switch the magnetization direction and a margin &Dgr;H. Data write magnetic field H
WR
is thus given by H
WR
=H
SW
+&Dgr;H.
In order to rewrite the storage data of the MTJ memory cell, that is, the magnetization direction of tunneling magneto-resistance element TMR, a data write current of a prescribed level or more must be applied to both write digit line WDL and bit line BL. Free magnetic layer VL in tunneling magneto-resistance element TMR is thus magnetized in the direction parallel or opposite (antiparallel) to that of fixed magnetic layer FL according to the direction of the data write magnetic field along the easy axis (EA). The magnetization direction written to tunneling magneto-resistance element TMR, i.e., the storage data of the MTJ memory cell, is held in a non-volatile manner until another data write operation is conducted
FIG. 21
is a conceptual diagram illustrating read operation from the MTJ memory cell.
Referring to
FIG. 21
, in read operation, access transistor ATR is turned ON in response to activation of word line WL. As a result, tunneling magneto-resistance element TMR is pulled down to ground voltage GND and electrically coupled to bit line BL.
If bit line BL is then pulled up to a prescribed voltage, a memory cell current Icell corresponding to the electric resistance of tunneling magneto-resistance element T
Auduong Gene N.
Renesas Technology Corp.
LandOfFree
Non-volatile semiconductor memory device conducting read... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Non-volatile semiconductor memory device conducting read..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile semiconductor memory device conducting read... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3291930