Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2002-10-29
2004-12-07
Thomas, Tom (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S698000, C257S725000, C438S107000, C438S110000
Reexamination Certificate
active
06828664
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a packaging substrate, more particularly, to a packaging substrate with electrostatic discharge protection.
2. Description of the Related Art
The working voltage of an integrated circuit is typically of 5; volts or less. When the integrated circuit is applied with relatively higher voltage, the integrated circuit will usually be damaged. Static electric charges are generated from friction, induction and contact; but the popularly used chips are rarely designed with a circuit for electrostatic discharge protection to safeguard against damage to chips from static electricity. Most chips are not equipped with such an electrostatic protective circuit.
In addition, during the process for packaging or molding the dies, when the mould compound is injected to package the die, static electric charges will be generated from friction, induction and contact between the mould compound and the packaging substrate or other medium. The electrostatic discharge will damage the die and fail the semiconductor package products.
Therefore, it is necessary to provide an innovative and advanced packaging substrate so as to solve the above problem.
SUMMARY OF THE INVENTION
One objective of the present invention is to provide a packaging substrate with electrostatic discharge protection. The packaging substrate is disposed in a mold. The mold comprises a recess having a shape corresponding to that of the packaging substrate, and the recess comprises an inner wall which is electrically connected to an outer wall of the packaging substrate. The packaging substrate comprises a first copper-mesh layer and a second copper-mesh layer extending to the outer wall to electrically connect the inner wall of the recess. Therefore, static electric charges generated during the molding process are conducted via the first copper-mesh layer or the second copper-mesh layer to the inner wall of the recess and then conducted away, preventing the dice to be packaged from damage due to electrostatic discharge, so as to raise the yield rate of semiconductor package products.
One objective of the present invention is to provide a packaging substrate with electrostatic discharge protection. The packaging substrate comprises a plurality of position holes used for receiving and electrically connecting position pins of the recess to position the packaging substrate in the recess. Because the first copper-mesh layer and the second copper-mesh layer are electrically connected to the position holes, static electric charges generated during the molding process are conducted via the first copper-mesh layer or the second copper-mesh layer to the position holes and then conducted away via the position pins. For this reason, the packaging substrate according to the invention can conduct the static electric charges away from the packaging substrate, preventing the dice to be packaged from damage due to electrostatic discharge.
REFERENCES:
patent: 5185654 (1993-02-01), Mosher et al.
patent: 6613979 (2003-09-01), Miller et al.
patent: 6700077 (2004-03-01), Chiang
patent: 2003/0102016 (2003-06-01), Bouchard
patent: 2004/0048009 (2004-03-01), Extrand et al.
patent: 59225550 (1984-12-01), None
Hung Chih-Pin
Lee Yung-Chi
Advanced Semiconductor Engineering Inc.
Seyfarth Shaw LLP
Thomas Tom
Warren Matthew E.
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