Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2002-11-26
2004-12-21
Tang, Minh (Department: 2829)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S799000
Reexamination Certificate
active
06833331
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates to a semiconductor integrated circuit device and also to a method of manufacturing thereof. More particularly, the present invention relates to an insulating film structure for forming a MISFET (Metal insulator Semiconductor Field Effect Transistor) having micro-dimensions and also to a technique that can effectively be used for a process of forming such a structure.
BACKGROUND OF THE INVENTION
Conventionally, the process of planarizing an insulating film formed on the gate electrode of a MISFET is carried out by means of a method of reflowing the deposited BPSG (Baron-doped Phospho Silicate Glass) film on the gate electrode at high temperature between about 850 and 900° C. However, in the current trend of down-sizing MISFETs to micro-dimensions, while the space between the gate electrodes of two adjacently located devices becoming small, it is highly difficult to use a BPSG film as insulating film to be planarized on the gate electrode.
A so-called self align contact technique (see, inter alia, Japanese Patent Application Laid-Open No. 9-252098) is typically used for the process of connecting wires to the source/drain of a MISFET having micro-dimensions by way of a contact hole. It is a technique of forming a silicon nitride film on the upper and lateral surfaces of the gate electrode in order to produce a contact hole by utilizing the difference between the rate of etching the silicon nitride film and that of etching the insulating film that is typically made of silicon oxide and deposited on the silicon nitride film so that no margin has to be taken into consideration for the alignment of the contact hole and the gate electrode.
However, when a silicon nitride film is formed on the upper and lateral surfaces of the gate electrode of a very fine MISFET, the space between the gate electrodes of two adjacently located devices can become extremely small. Then, voids can appear in the BPSG film buried in the space. Additionally, in the case of a device to be manufactured on a design rule adapted to dimensions of 0.25 &mgr;m or less, the performance of the manufactured MISFET can become degraded when a BPSG film that requires a heat treatment involving temperature above 800° C. is applied thereto after forming the MISFET.
A Spin On Glass (SOG) film that can be obtained by applying a chemical solution of a silicon compound dissolved in an organic solvent and baking it at temperature between about 400 and 450° C. to gasify and dispel the solvent is expected to be used as a planarized insulating film to be formed on the gate electrode of a MIS device with dimensions of 0.25 &mgr;m or less requiring low process temperature because it shows an excellent gap filling effect for the space between the gate electrodes of two adjacently located devices and not costly.
Additionally, an SOG film formed by using hydrosilsesquioxan as raw material shows a low dielectric constant if compared with a silicon oxide film formed by means of CVD and hence is expected to provide an effect of reducing the wiring delay when used as interlayer insulating layer of a multilayer metal wiring system.
On the other hand, SOG film has drawbacks including (I) that it can give rise to corrosion to metal wires because it is less resistant to moisture than a CVD-silicon oxide film and (ii) that it is soft and hence can hardly withstand chemical mechanical polishing (CMP) so that, when planarizing a global region including densely wired area and scarcely wired areas, the CMP process has to be conducted after depositing a silicon oxide film on the SOG film. A variety of techniques have been proposed to bypass the drawbacks.
For instance, Japanese Patent Application Laid-Open No. 3-330982 discloses a technique of reducing the hygroscopicity of SOG film by baking the SOG film at temperature between 400 and 750° C., subjecting it, if necessary, to an oxygen plasma processing operation (or an argon injecting operation), forming thereon an anti-moisture film (e.g., CVD-oxide film) and then thermally treating it at temperature between 550 and 750° C.
Japanese Patent Application Laid-Open No. 8-78528 discloses a technique of preventing the aluminum (Al) wires of a device from being corroded by the gas (containing moisture) produced by the SOG film as a result of degasification by forming a through hole through the insulating film (CVD-oxide film/SOG film/CVD-oxide film) on the aluminum wire, discharging the gas by thermally treating the device at temperature between 300 and 350° C. and subsequently forming a side wall spacer of silicon oxide film along the lateral wall of the through hole.
Japanese Patent Application Laid-Open No. 9-283515 describes a technique of suppressing micro-projections that can appear on the surface of a ceramic-like silicon oxide film when an SOG film is heat-treated in an inert gas atmosphere, the technique comprising steps of spin-coating a solution of hydrosilsesquioxan (HSQ) onto a substrate, conducting a first heat treatment process at temperature lower than 400° C. to turn it into a pre-ceramic film and subsequently conducting a second heat treatment process at temperature lower than 400° C. in an oxidizing gas atmosphere (oxygen+nitrogen) to produce a ceramic-like silicon oxide film.
Japanese Patent Application Laid-Open No. 8-125021 describes a technique of perfectly hardening an SOG film comprising steps of quasi-hardening the SOG film in a preliminary heat treatment process conducted at temperature between 70 and 220° C., modifying a surface layer of the SOG film by treating it with ozone/ultraviolet rays and subsequently heat-treating it in a process conducted in an oxygen or nitrogen atmosphere and including a pre-heat-treatment at 400 to 500° C. and a post-heat-treatment at 700 to 1,000° C.
Finally, Japanese Patent Application Laid-Open No. 10-107026 describes a technique of improving the ant-crack performance of an SOG film made of hydrosilsesquioxan (HSQ) and raising the density thereof by curing it with electron beams at temperature between room temperature and 500° C.
SUMMARY OF THE INVENTION
The inventors of the present invention have looked into the feasibility of using polysilazan type SOG film and hydrosilsesquioxan type SOG film for the planarized insulating film to be formed on the gate electrode of a MISFET.
Polysilazan is characterized by having a molecular structure where nitrogen (N) atoms and hydrogen (H) atoms are bonded to each silicon (Si) atom. For forming SOG film, using polysilazan as raw material, firstly a chemical solution prepared by dissolving polysilazan into a solvent is applied onto a substrate by spin coating and then the applied solution is baked to gasify and dispel the solvent. Subsequently, the SOG film is subjected to a steam-oxidation process at high temperature to make the hydrogen atoms bonded to the silicon atoms and the NH-radicals react with each other in a manner as expressed by chemical formula (1) for each molecule. Then, the produced hydrogen gas and ammonium gas are made to leave the film to produce a dense and highly moisture-resistant SOG film having Si—O—Si bonds.
However, the inventors of the present invention have found that the obtained SOG film contains a trace of residual nitrogen originating from polysilazan. Therefore, when an SOG film is formed on the gate electrode with a silicon nitride film interposed therebetween, it is no longer possible to secure a satisfactory level of etch selectivity necessary for forming a contact hole by utilizing the difference between the rate of etching the silicon nitride film and that of etching the SOG film particularly if the contact hole is required to have a small diameter.
On the other hand, hydrosilsesquioxan has a molecular structure where oxygen (O) atoms and hydrogen (H) atoms are bonded to each silicon (Si) atom and hence does not contain any nitrogen in the molecule. For forming SOG film, using hydrosilsesquioxan as raw material, a chemical solution prepared by dissolving hydrosilsesquioxan into a solvent is applied onto a su
Fukuda Takuya
Hirasawa Masayoshi
Hotta Katsuhiko
Kojima Masayuki
Maruyama Hiroyuki
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Kilday Lisa
Tang Minh
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