Detecting and handling bus errors in a computer system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Testing of error-check system

Reexamination Certificate

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Details

C714S043000, C714S056000

Reexamination Certificate

active

06701469

ABSTRACT:

TECHNICAL FIELD
This invention relates to detecting and handling bus errors in a computer system.
BACKGROUND
Data travels from site to site within a computer along connections known generally as buses. Most computers have a way to check the data sent along a bus, to assure the data has not been corrupted in transit. If a discrepancy in the data is detected, some form of error correction or control is applied. Many computers use error correcting routines for correcting transient or non-repeating errors. For other errors, such as a breakdown in the bus hardware, the error correcting routine may call for a shutdown of the system until the breakdown can be repaired.
SUMMARY
In general, in one aspect, the invention features sending digital signals in a predetermined sequence from a sending end of a bus wire, receiving a corresponding sequence of digital signals at a receiving end of the bus wire, and comparing each of the digital signals of the received sequence with a corresponding predetermined signal of the predetermined sequence to determine whether an error has occurred.


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