Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-12-17
2004-03-23
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S629000, C438S631000, C438S637000
Reexamination Certificate
active
06709973
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a method of fabricating a semiconductor device such as LSI (large-scale integrated circuit), and more particularly, to a method for disposing metal wiring on the surface of an insulating film formed on a semiconductor substrate.
2. Description of Related Art
In the steps of fabricating a semiconductor device such as LSI, a so-called damascene process may, in some cases, be used in order to form a metal wiring pattern on the surface of an insulating film formed on a semiconductor substrate.
FIGS. 8A
to
8
G are cross-sectional views showing the steps of forming a metal wiring pattern by a conventional damascene process. As shown in
FIG. 8A
, an insulating film
92
composed of SiO
2
(silicon dioxide) is formed on a semiconductor substrate
91
. As shown in
FIG. 8B
, a recess
93
for embedding metal wiring is formed by using a photolithography technique in a portion, corresponding to a region where metal wiring should be formed, on the surface of the insulating film
92
.
Thereafter, as shown in
FIG. 8C
, a barrier metal film
94
composed of TiN (titanium nitride), for example, is formed on the insulating film
92
having the recess
93
formed therein. Further, as shown in
FIG. 8D
, a seed film
95
composed of a metal such as Cu (copper) is formed on the barrier metal film
94
. As shown in
FIG. 8E
, the seed film
95
is subjected to electroplating using a metal of the same type as that composing the seed film
95
, to form a metal wiring film
96
.
CMP (Chemical Mechanical Polishing) processing is then performed, so that the metal wiring film
96
, the seed film
95
, and the barrier metal film
94
on the insulating film
92
are successively ground away, as shown in
FIGS. 8E
to
8
G. All the metal wiring film
96
, the seed film
95
, and the barrier metal film
94
, which are laminated on a surface area
92
a
outside the recess
93
in the insulating film
92
, are ground away, so that the whole of the surface area
92
a
is exposed. The CMP processing is then terminated. Consequently, the pattern of metal wiring
97
, which has been embedded in the recess
93
, is formed on the surface of the insulating film
92
.
In the above-mentioned conventional method, however, the surface, outside the recess
93
, of the insulating film
92
and the surface of the metal wiring
97
are not flush with each other, and the surface of the metal wiring
97
becomes depressed in a dish shape in cross-sectional view, that is, so-called dishing occurs, as shown in
FIG. 8G
, at the time when the CMP processing is terminated.
The foregoing will be described in detail. If the metal wiring film
96
is formed on the seed film
95
by electroplating, a depression occurs in a portion, opposite to the recess
93
in the insulating film
92
, on the surface of the metal wiring film
96
, as shown in
FIG. 8E. A
surface plate pad used in CMP processing thereafter performed is composed of a material having flexibility, for example, foamed polyurethane. Therefore, the surface plate pad is deformed in a shape along the inequality in the surface of the metal wiring film
96
, to polish the whole surface of the metal wiring film
96
almost uniformly. Consequently, the surface of the metal wiring film
96
is ground away in a state where the portion, opposite to the recess
93
in the insulating film
92
, is depressed. At the time point where the surface of the metal wiring film
96
in the recess
93
is almost flush with the surface, outside the recess
93
, of the insulating film
92
, therefore, the metal wiring film
96
, the seed film
95
, and the barriermetal film
94
remain on the surface area
92
a
, as shown in FIG.
8
F.
When the CMP processing is continued in order to remove the metal wiring film
96
, the seed film
95
, and the barrier metal film
94
which remain on the surface area
92
a
, the metal wiring film
96
in the recess
93
is gradually ground away. In the CMP processing, the metal wiring film
96
composed of a metal material such as Cu is ground away more easily than the barrier metal film
94
composed of TiN, for example. Therefore, after the barrier metal film
94
is exposed in the surface area
92
a
, the polishing rate of an area of the metal wiring film
96
in the recess
93
is higher than that in an area of the barrier metal film
94
on the surface area
92
a
. As a result, at the time point where the whole surface area
92
a
is exposed, the metal wiring
97
, which is embedded in the recess
93
, is dished.
By the dishing of the metal wiring
97
, the cross-sectional area of the metal wiring
97
is smaller than its designed or desired value. As a result, the electrical resistance of the metal wiring
97
is larger than its designed or desired value.
In a case where multi-layer wiring is formed on a semiconductor substrate, if the metal wiring
97
is dished, the subsequent steps are adversely affected. In a case where the metal wiring
97
is dished, for example, when a further silicon dioxide insulating film is formed on the insulating film
92
in which the metal wiring
97
has been embedded, a portion, opposite to the metal wiring
97
, on the surface of the further silicon dioxide insulating film becomes depressed, resulting in defocusing at the exposure process in a photolithographic process for patterning the further insulating film with a recess for embedding a further metal wiring. After a metal wiring film is formed on the further silicon dioxide insulating film, CMP processing is performed in order to remove an unnecessary portion, outside the recess, of the metal wiring film. However, the metal wiring film disadvantageously remains in a depression occurring in the further silicon dioxide insulating film. Therefore, the further metal wiring thus formed may be short-circuited by the remaining metal wiring film.
As a method of avoiding such a problem, it is considered that the photolithographic process is carried out after the surface of the further silicon dioxide insulating film is flattened. However, this method is not preferable because the number of steps is increased, thereby increasing the fabrication cost.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of fabricating a semiconductor device, in which metal wiring can be prevented from being dished.
In order to attain the above-mentioned object, a first aspect of the present invention is directed to a method of fabricating a semiconductor device by disposing metal wiring on the surface of an insulating film formed on a semiconductor substrate, comprising the steps of forming a recess in the insulating film; laminating a metal wiring film composed of a metal wiring material on the insulating film having the recess formed therein; selectively removing the metal wiring film laminated on a surface area outside the recess in the insulating film; and polishing the metal wiring film laminated above the recess by chemical mechanical polishing after selectively removing the metal wiring film.
It is preferable that the step of polishing the metal wiring film by the chemical mechanical polishing is continued until the surface of the metal wiring film and the surface, outside the recess, of the insulating film are almost flush with each other.
According to the present invention, the metal wiring film on the surface area outside the recess in the insulating film is removed before processing using the chemical mechanical polishing is performed. Therefore, the chemical mechanical polishing processing for removing an unnecessary portion of the metal wiring film can be terminated at the time point where the surface of the metal wiring film is flush with the surface, outside the recess, of the insulating film. Consequently, the metal wiring embedded in the recess in the insulating film can be prevented from being dished.
Consequently, it is possible to obtain good-quality metal wiring having a cross-sectional area and an electrical resistance which are equal to thei
Arent Fox Kintner Plotkin & Kahn
Picardat Kevin M.
Rohm Co. Ltd
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