Pulse or digital communications – Spread spectrum – Direct sequence
Reexamination Certificate
2000-05-24
2004-04-06
Bocure, Tesfaldet (Department: 2631)
Pulse or digital communications
Spread spectrum
Direct sequence
C375S150000
Reexamination Certificate
active
06717977
ABSTRACT:
This application claims priority under 35 U.S.C. §§119 and/or 365 to 99-18853 filed in Korea on May 25, 1999; the entire content of which is hereby incorporated by Reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus for acquiring a pseudo noise (PN) code and a direct sequence code division multiple access (DS-CDMA) receiver including the same.
2. Description of the Related Art
CDMA is a type of spread-spectrum communication method, and is used for the interim standard (IS)-95 system, which is currently the mobile communication standard of Korea. Active research on CDMA is being currently made as the CDMA has been proposed for the international mobile telecommunication (IMT)-2000.
The CDMA system is popular since it has various advantages compared with other systems. In the CDMA system, it is not possible to distinguish noise from a transmission signal in a channel since the signal is spread using a PN code. Therefore, interception cannot be performed unless a correct code is known. Also, the CDMA system is resistant to intentional jamming due to the characteristic of the spread-spectrum system. A diversity effect is obtained in the CDMA system since a RAKE receiver is used in a multi-path channel.
The spread-spectrum method adopted in the IS-95 system is a direct sequence (DS) spread-spectrum. In the DS spread-spectrum, the spectrum is spread by multiplying the PN code, which has a duration (referred to as chip duration) much smaller than symbol duration, with a signal to be transmitted. Namely, the spectrum is spread by multiplying 64 binary PN codes with one binary symbol to be transmitted. One symbol is divided into 64 chips.
A receiver despreads a received DS spread-spectrum signal and detects symbols as they were prior to being spread. In order to despread the received DS spread-spectrum signal, it is important to acquire PN code synchronization. The synchronization of the PN code is realized by two steps of code acquisition and tracking and plays a very important role in determining the performance of the system.
In DS spread-spectrum, code acquisition can be performed by various methods. In the most commonly used method, the receiver generates the PN code using the same PN code generator as the PN code generator used in a transmitter, obtains partial correlation between the PN code and a received signal, compares the partial correlation value with a threshold value, and determines whether the code is acquired. Such a process is referred to as search.
A search range is one period of the PN code during the code acquisition. The search is performed until the phase of the PN code coincides with that of the received signal by obtaining the partial correlation value while changing the phase of the code in one period of the PN code. The one period of the PN code to be searched is referred to as an uncertainty region. In the IS-95 system, since the number of the PN code is 32768(=2
15
), 32768 code phases are to be searched in the worst case. The uncertainty region can be divided into several sections and those sections can be searched using different correlators. The search method is divided into a serial search method, a parallel search method, and a hybrid search method according to how many correlators are to be used for searching the uncertainty region.
In the serial search method, the entire uncertainty region is searched using one correlator. In the serial search method, the code is acquired by repeating processes of obtaining a correlation value with respect to one code phase, determining whether the code is acquired, and searching another phase when the code is not acquired. In the serial search method, hardware is much less complex than in the parallel and hybrid search methods, since only one correlator is necessary. However, much more time is spent on acquiring the code than in the other methods.
In the parallel search method, the code is acquired using the correlator in parallel with respect to the entire uncertainty region. In the parallel search method, much less time is spent on acquiring the code than in the serial search method, since the entire uncertainty region is searched at one time. However, since as many correlators as the number of the code are necessary, the complexity of hardware increases in proportion to the number of correlators.
In the hybrid search method where the serial search method and the parallel search method are combined, the uncertainty region is divided into several regions and is searched by several correlators. Namely, the correlators of the serial search method, where the regions to be searched are reduced, search the uncertainty regions in parallel. Therefore, in the hybrid search method, it is possible to reduce time spent on acquiring the code compared to in the serial search method and to reduce the complexity of hardware compared to in the parallel search method.
The structure of the correlator for obtaining the partial correlation value during the code acquisition is divided into an active correlator and a PN matched filter.
In the active correlator, the partial correlation value is obtained by multiplying one input data with one code generated by the PN code generator and integrating the multiplication result for an N-chip duration. That is to say, the PN code of N bits is integrated chip-by-chip.
FIG. 1
shows the structure of a hybrid searching unit in which the conventional active correlator is used. The searching unit shown in
FIG. 1
includes a PN code generator
100
, a plurality of multiplexers MUXs
102
,
103
, and
104
, and a plurality of accumulators
105
,
106
, and
107
. As shown in
FIG. 1
, a hybrid searching unit searches the uncertainty region by using K different PN code phases at one time. The PN code generator
100
generates K PN codes having different phases. The PN code which is a binary code has a value of 0 or 1. The MUXs
102
,
103
, and
104
output +d
n
when the PN code is 0 and output −d
n
when the PN code is 1. Namely, the MUXs
102
,
103
, and
104
output d
n
when the PN code is 0 and output −d
n
when the PN code is 1 from input data d
n
received at a chip rate and the PN codes generated by the PN code generator
100
. The output data of the MUXs
102
,
103
, and
104
are accumulated by the K accumulators
105
,
106
, and
107
for a certain time. The accumulated values become partial correlation values S
0
through S
K−1
with respect to K different PN code phases. The partial correlation values are finally compared with predetermined threshold values. Accordingly, it is determined whether the code is acquired.
However, this method has a problem in that a long time is spent on acquiring the code, since one partial correlation value is obtained with respect to the input data of N bits.
FIG. 2A
shows the configuration of a hybrid searching unit in which the conventional PN matched filter is used. The hybrid searching unit shown in
FIG. 2A
includes N delayers
200
, a first N-code storage portion
201
, a second N-code storage portion
202
, and a Kth N-code storage portion
203
. As shown in
FIG. 2A
, delayers
200
delay the input data d
n
for the chip duration. The code storage portions
201
,
202
, and
203
store the PN codes in advance. The N input data output from the delayer
200
are multiplied with the respective codes stored in each code storage portion
201
,
202
, and
203
and the multiplication results are added to each other, thus obtaining the partial correlation values S
0
through S
K−1
are obtained. The partial correlation values are finally compared with predetermined threshold values. Accordingly, it is determined whether the code is acquired.
FIG. 2B
shows the PN matched filter corresponding to a (K−1)th code storage portion among the PN matched filters shown in FIG.
2
A. The PN matched filter shown in
FIG. 2B
includes a (K−1)th code storage portion
203
, a plurality of multipliers
211
,
212
, and
213
, and an adder
214
.
The multipliers
Bocure Tesfaldet
Burns Doane , Swecker, Mathis LLP
Ghulamali Qutub
Samsung Electronics Co,. Ltd.
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