Fuse programmable I/O organization

Details Fuse programmable I/O organization Fuse programmable I/O organization

2002-07-31

2004-03-16

Hoang, Huan (Department: 2818)

Static information storage and retrieval

Read/write circuit

Having fuse element

C365S189050

Reexamination Certificate

active

06707746

ABSTRACT:

TECHNICAL FIELD
The present invention relates to semiconductor devices such as memory chips and related processes wherein the device may be configured for providing a selected number of input/output channels, and more specifically, the invention relates to methods and circuitry for initially selecting or changing the selection of the input/output channel organization after the semiconductor device has been encapsulated. The features of the invention may also be used to reduce the time required for product testing. For example, the configuration can be preset during fabrication or bond option to the configuration that allows the shortest or most efficient testing. The tested package can when necessary be reconfigured to a customer's requirement according to the teachings of the invention. As used herewith, the term input/output is intended to cover an input configuration only, an output configuration only or configuration which includes both input and output signals. It should also be appreciated that the features of this invention are also applicable to flip-chip packages and flip-chip circuits mounted on a board.
BACKGROUND OF THE INVENTION
As will be recognized by those skilled in the art, it is common to provide basic semiconductor devices such as memory chips which are identical internally, but may be configured to provide various input/output channel configurations. For example, a typical memory chip may be configured to provide 4, 8, 16 or even 32 input/output channels. According to prior art methods, such devices or chips are configured for a specific number of input/output channels by connecting selected bond pads to a V
DD
(or V
ss
) power source by means of bond wires. Once a chip or semiconductor device is packaged or encapsulated, neither the unused bond pads nor the previously connected bond wires are accessible. Consequently, it is not possible to reconfigure or otherwise change the input/output channel organization or selection.
Unfortunately, an input/output channel selection or organization initially established on a large number of encapsulated semiconductor devices may for various reasons no longer be marketable. Consequently, the chip is often simply destroyed, or at best, sold at a deep discount.
Therefore, it is an objective of the present invention to provide encapsulated semiconductor devices which may allow a choice of selected input/output configurations.
It is another object of the present invention to provide semiconductor devices which have an initial input/output configuration at the time of encapsulation, but which can still be changed to a different input/output configuration after encapsulation.
It is yet another object of the present invention to provide encapsulated semiconductor devices wherein a first input/output configuration is selected after encapsulation and subsequently the selected input/output configuration is changed to a second input/output configuration which is different than the first configuration.
SUMMARY OF THE INVENTION
The methods and circuitry of the invention uses latch fuse circuitry (both regular fuses and anti-fuses) to allow initial input/output channel configuration after encapsulation or reconfiguration from an initial configuration after encapsulation. Furthermore, the features of the invention are also applicable to flip-chip packages and braid mounted flip-chips. According to one embodiment of the invention, fuse latch circuitry provides a selection signal to a x4, x8 or other appropriate selection circuit after encapsulation. The selection signal from the fuse latch circuitry is determined by blowing fuses or anti-fuse to control the selection signal. Other embodiments include parallel circuitry such that a first set of fuse latch circuits can be disabled at the same time as a second set of fuse latch circuits are enabled. This allows for the reconfiguration.


REFERENCES:
patent: 4987325 (1991-01-01), Seo
patent: 5355340 (1994-10-01), Coker et al.
patent: 6141273 (2000-10-01), Ku et al.
patent: 6225836 (2001-05-01), Kitade
patent: 6356958 (2002-03-01), Lin

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