Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-12-10
2004-09-21
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S421000, C257S424000, C257S427000, C365S158000, C365S171000, C365S173000
Reexamination Certificate
active
06794696
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2002-278071, filed on Sep. 24, 2002, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a magnetic memory device and a method of manufacture of the same. More specifically, the present invention relates to the structure of wirings of a magnetic memory device.
2. Description of the Related Art
Magnetic memory devices that utilize magnetic properties are known. The magnetic memory devices store information utilizing the tunneling magnetoresistance (referred hereinafter to as TMR) effect.
One example of such magnetic memory devices is a so-called magnetic random access memory (MRAM). The MRAM, which is a generic name for solid memories that utilize a direction of a magnetization of a ferromagnetic material as an information recording carrier, can rewrite, hold and read recorded information whenever necessary.
FIG. 22A
is a plan view schematically illustrating the structure of part of a typical magnetic memory device.
FIG. 22B
is a sectional view taken along line XXIIB—XXIIB of FIG.
22
A. As shown in these figures, first and second write wirings
201
and
202
are arranged in a matrix form. A memory cell
203
is placed between the first and second write wirings
201
and
202
at each of intersections thereof.
As each of the memory cells
203
use is made of a MTJ element based on a magnetic tunnel junction (MTJ) (see, for example, ISSCC 2000 Digest Paper TA7.2). The MTJ element is comprised of a fixed layer, a tunnel barrier layer, and a recording layer, which are stacked in sequence.
In writing information into a selected memory cell, currents are caused to flow through the first and second write wirings associated with the selected cell. As a result, a magnetic field is produced at the intersection between the first and second write wirings, reversing the magnetization direction of the recording layer of the selected cell. Binary information is recorded depending on whether the magnetization direction of the recording layer is parallel or antiparallel with respect to that of the fixed layers. The intensity of a magnetic field (switching field) required to reverse the magnetization direction will be of the order of tens of Oe in a 0.1-&mgr;m rule by way of example.
The reading of recorded information is achieved by utilizing the magnetoresistance. The magnetoresistance is a phenomenon by which the electrical resistance of a memory cell changes according to the relative angle between the magnetization direction of the ferromagnetic body of the cell and current. A change in the resistance is read by causing current to flow in the memory cell.
As described above, in writing information into a selected memory cell
203
a current is caused to flow in each of the first and second write wirings
201
and
202
. Memory cells in the neighborhood of the selected memory cell (hereinafter referred to as semi-selected memory cells) are affected by magnetic fields resulting from the currents in the wirings. As a consequence, the semi-selected memory cells may be written with erroneous information. This problem will become more serious as the integrated density of magnetic memory devices increases and hence the spacing between each memory cell decreases.
In order to prevent the semi-selected memory cells from being written with erroneous information, it may be effective to adjust the current value in each of the write wirings
201
and
202
associated with a selected memory cell. In order to generate the aforementioned switching field, however, it is required to cause a current of a predetermined magnitude in each of the write wirings. For this reason, a problem arises in that the tolerance for the current value at the time of writing is very small.
BRIEF SUMMARY OF THE INVENTION
According to a first aspect of the present invention, there is provided a magnetic memory device comprising: a magnetoresistance configured to store information; and a first wiring provided along a first direction, the first wiring applying a magnetic field to the magnetoresistance element and having a second surface which faces the magnetoresistance element and a first surface opposite to the second surface, the second surface being smaller in width than the first surface.
According to a second aspect of the present invention, there is provided a method of manufacturing a magnetic memory device comprising: forming a first wiring over a semiconductor substrate along a first direction, the first wiring having a first surface which faces the semiconductor substrate and second surface opposite to the first surface, the second surface being smaller in width than the first surface; and forming a magnetoresistance element which records information over the first wiring.
REFERENCES:
patent: 6211090 (2001-04-01), Durlam et al.
patent: 6653703 (2003-11-01), Hosotani et al.
Roy Scheuerlein et al., “10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC 2000, Digest Paper TA 7.2, pp. 128-129.
Masashige SATO et al., “Spin-Valve-Like Properties of Ferromagnetic Tunnel Junctions”, Jpn. J. Appl. Phys. vol. 36, (1997) pp. L 200 -L 201.
Koichiro Inomata et al., “Spin-Dependent Tunneling Between a Soft Ferromagnetic Layer and Hard Magnetic Nanosize Particle”, Jpn. J. Appl. Phys. vol. 36, (1997) pp. L 1380 -L 1383.
Hogan & Hartson LLP
Kabushiki Kaisha Toshiba
Tran Mai-Huong
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