Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2003-02-12
2004-04-20
Pert, Evan (Department: 2829)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
Reexamination Certificate
active
06723630
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application claims the priority benefit of Taiwan application serial no. 91103531, filed Feb. 27, 2002.
BACKGROUND OF INVENTION
1. Field of Invention
The present invention relates to a solder ball fabrication process. More particularly, the present invention relates to a solder ball fabrication process for the fabrication of a wafer-level chip scale package (WLCSP).
2. Description of Related Art
Due to the trend of developing light and compact electronic products, the size of most integrated circuit packages continues to decrease. To reduce the size of integrated circuit (IC) packages, chip scale packages (CSP) have been developed. In general, the edge length of a CSP package is roughly 1.2 times the edge length of a silicon chip or the chip/package has an area ratio of about 80% and the pitch between leads is limited to a value under 1 mm. Many types of chip scale packages are now available. However, the most common type is one having the package directly formed on the wafer, known also as a wafer-level chip scale package (WLCSP).
One major characteristic of a WLCSP is the fabrication of a redistribution circuit (RC) on the surface of the chip so that the bonding pads originally positioned around the periphery of the chip are redistributed as an area array on top of the chip. Hence, the entire surface of the chip can be utilized for accommodating bonding pads, thereby producing a larger pitch between bonding pads to meet the larger distance of separation between contacts on a printed circuit board (PCB). In addition, solder balls are attached to the bonding pads of the chip manually or automatically so that the bonding pads on the chip are electrically connected to the contacts on the PCB through the solder balls.
However, if the positions of the original bonding pads and pitch between the original bonding pads on the chip match the contact pitch in the printed circuit board, there is no need to form the redistribution circuit on the chip. In other words, the solder balls may be directly attached to the original bonding pads on the chip. In the following description, the solder ball pads refer to all the bonding pads on a chip requiring solder ball attachment, for example, including the original bonding pad on the chip or the bonding pads on the redistribution circuit above the chip.
As integrated circuit design progresses and the level of integration continues to increase, the number of output pads in a chip also increases. Yet, surface area of the chip often remains identical or is reduced slightly. Under such circumstances, the conventional solder ball attachment technique can hardly accommodate fine solder balls. Ultimately, small fine pitch solder balls have to be used in the fabrication of WLCSP.
Furthermore, the conventional solder ball attachment technique can be roughly classified into the automatic ball attachment method and the manual ball attachment method. The automatic ball attachment method costs more to operate, especially for attaching small fine pitch solder ball. Although the manual ball attachment method is less expensive to operate, substantial labor force is required and overall ball attachment efficiency is relatively low. Since it is difficult to attach small fine pitch solder balls to the bonding pad of a chip in a WLCSP, a larger size bump is often attached to the bonding pad of the chip instead of a solder ball.
Because lead-tin alloy has a good bonding strength as well as physical and conductive properties, lead-alloy is often used as a solder material for joining devices on a chip with contacts on the printed circuit board in the fabrication of integrated circuit packages. However, lead is a toxic material that often causes health hazards and environmental concerns. Thus, the electronic industry is actively looking for a lead-free substitute for the lead-containing solder material. At present, a number of lead-free solder materials have already been developed. In the near future, all lead-containing solder material will be replaced.
SUMMARY OF INVENTION
Accordingly, one object of the present invention is to provide a solder ball fabrication process for directly forming a solder ball on the bonding pad or solder ball pad of a wafer in a wafer level chip scale package (WLCSP). The solder ball fabrication process not only increases production rate, but the size and height of the solder ball is also much easier to control within the required range.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a solder ball fabrication process for producing at least one solder ball on a wafer. The wafer has an active surface, a passivation layer and at least one bonding pad. The passivation layer and the bonding pad are formed on the active surface of the wafer such that the passivation layer exposes the bonding pad. The wafer further includes a stress buffer layer and at least one under-ball-metallurgy layer. The under-ball-metallurgy layer is formed over the bonding pad. The stress buffer layer is formed over the passivation layer. The stress buffer layer has an opening that exposes the under-ball-metallurgy layer. First, a patterned first solder mask layer is formed over the stress buffer layer. The first solder mask has at least one first opening that exposes the under-ball-metallurgy layer. Thereafter, a patterned second solder mask layer is formed over the first solder mask layer. The second solder mask layer has at least a second opening located at a position corresponding to the first opening and exposing the under-ball-metallurgy layer. The second opening also has a diameter greater than that of the first opening. A solder material is deposited into the first and second opening and then a reflow process is carried out so that the solder material inside the openings melts to form a solder ball above the under-ball-metallurgy layer. Finally, the first solder mask layer and the second solder mask layer are removed.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 6555296 (2003-04-01), Jao et al.
patent: 6596618 (2003-07-01), Narayanan et al.
Chen Jau-Shoung
Chou Yu-Chen
Fang Jen-Kuang
Huang Min-Lung
Lee Chun-Chi
Advanced Semiconductor Engineering Inc.
Harrison Monica D.
Jiang Chyun IP Office
Pert Evan
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