Method of fabricating a bipolar transistor using selective...

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction

Reexamination Certificate

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Details

C438S350000, C438S365000, C438S481000

Reexamination Certificate

active

06699765

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a bipolar transistor.
2. Description of the Related Art
A typical bipolar transistor has an emitter, a base, and a collector. Typically, the emitter and collector are semiconductor materials of one type (N- or P-type), and the base is a semiconductor material of an opposite type (P- or N-type), such that NPN or PNP junctions are formed between the emitter, base, and collector.
When the transistor is activated, a small forward bias voltage is applied between the emitter and the base. The bias voltage lowers the energy barrier that exists at the junction between the emitter and the base, causing the transistor to turn on. When such a junction is made between materials of the same basic composition, the junction is called a homojunction. When such a junction is made between two dissimilar materials, the junction is called a heterojunction.
Lately, practitioners have focused on heterojunction bipolar transistors (HBT) in an attempt to achieve higher switching speeds. For instance, one type of HBT includes an emitter structure formed of N-doped polysilicon and a base layer formed of a P-doped silicon germanium alloy (SiGe).
SUMMARY OF THE INVENTION
The invention relates to a bipolar transistor in a semiconductor chip, and methods of fabricating the transistor. The transistor may be used, for instance, in a bipolar or BiCMOS process. The transistor may be a heterojunction bipolar transistor with either a drift or a box profile.
An exemplary embodiment of a bipolar transistor within the present invention includes an emitter structure, a base layer, and a collector layer. A dielectric isolation layer including a central aperture overlies the base layer and a bird's beak region of an adjacent field oxide layer. An emitter structure makes contact with the base layer through the central aperture of the dielectric isolation area, forming the emitter-base junction. A collector pedestal implant region may be formed directly beneath the central aperture of the dielectric isolation layer. A base contact may be coupled to base layer through a link implant region.
In one embodiment, the transistor is a heterojunction bipolar transistor. The base layer of such a transistor may be formed of selectively grown SiGe.
An exemplary method of forming a bipolar transistor within the present invention includes providing a substrate including a region of a first type; forming a buried layer of a second type in the region of the substrate; forming an epitaxy layer of the second type on the buried layer; masking the surface of the epitaxy layer for defining an active area; forming a field oxide layer on the surface of the epitaxy layer surrounding the active area; patterning the substrate to define a base region in the active area; growing in the base region a base layer (e.g., selectively grown SiGe) bound by the field oxide layer; forming a dielectric isolation layer having a central aperture over the base layer and an adjacent bird's beak area of the field oxide layer; forming an emitter structure over the dielectric isolation layer in a manner such that the material of the emitter structure contacts the SiGe layer through the central aperture in the dielectric isolation layer, so that an emitter-base junction may be formed; and forming a collector contact and a base contact.


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