Optical communications – Optical transceiver – Including optical fiber or waveguide
Reexamination Certificate
2000-09-01
2004-01-06
Negash, Knife-Michael (Department: 2633)
Optical communications
Optical transceiver
Including optical fiber or waveguide
C398S045000, C398S135000, C398S164000, C385S014000
Reexamination Certificate
active
06674971
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
This invention most generally relates to data transfer and broadband communication networks within a parallel computing system or a local area network. In particular, the present invention relates to a method and system for high bandwidth data transfer using fiber optics.
2. Background of the Invention
Technological advancements have dramatically increased the capabilities and possibilities of computing electronics. The increased bandwidth and data transfer rates have resulted in commercial innovation and scientific advancements in many fields. However, data transfer continues to be a bottleneck. This is true for data transfer within an integrated circuit (IC), from one chip to another, from hybrid circuit to hybrid circuit, from integrated circuit board to another integrated circuit board, and from system to system.
Another driving factor leading to ever increasing demands for faster data transfer rates is the need to do tasks that are more complex, requiring multiple computing nodes to cooperate. Digital signal processing, image analysis, and communications technology all require a greater bandwidth. The demand for increased data transfer capability and greater bandwidth translates into increases in both the speed of the data transfer, and the amount of data that is transferred per unit time.
In general, the problems associated with data transfer within an IC and on a system network are similar. With respect to IC's, increasing the rate of data transfer can be accomplished by increasing the number of data transfer lines and transferring the data in parallel, and/or increasing the transmission speed. There are limitations to the number of I/O lines such as spacing and size requirements, noise problems, reliability of connectors, and the power required to drive multiple lines off-chip. Increasing the transmission speed also has some limitations, as increasing the speed also increases power requirements, introduces timing skew problems across a channel, and usually requires more exotic processing than is standard practice. Combining higher clock speeds and more I/O connections in order to increase bandwidth is exceedingly difficult and impractical using electronics alone.
Using traditional technology, there is a practical upper limit to the number of bit lines that are possible. So long as the technology is based on signals being of an electrical nature, each increase in the number of lines means a corresponding increase in the number of conductors that are required, and the associated problems that are well known in the art.
Due to IC packaging constraints, there is a limited electronic I/O bandwidth. According to present manufacturing techniques, an IC package can have a maximum of approximately five hundred I/O pins due to problems associated with the connections between the IC substrate and the IC package. The most common manufacturing techniques used to interconnect an integrated circuit VLSI die with a package are wire-bonding and tape automated bonding. The maximum clock rate of an I/O pin is typically a few hundred Mbps (millions of bits per second) due to capacitance and inductance and crosstalk associated with the connections between the die and the package. Therefore, the maximum I/O bandwidth of a single IC package is directly proportional to the number of pins times the clock rate per pin. In general, the maximum I/O bandwidth of a packaged IC is typically in the tens of Gigabits/second.
A computer system “bus” is an interconnection allowing communication between plug-in modules. The plug-in modules, typically printed circuit boards (PCB), connect to the bus on a backplane printed circuit board. The data transfers are controlled according to the bus protocol. Plug-in modules typically connect to the bus through edge connectors and drive the bus through high power bus transceivers. Various standards define the physical backplane PCB, the mechanical packaging and the bus protocols. There are also a number of bus standards, including PCI, VME, FutureBus+, and Nubus standards.
There are a number of limitations to the bus connection system. In order to transfer data, a plug-in module typically acts as a bus master, and distributed protocols are used to arbitrate between contending plug-in modules and to appoint the bus-master. To actually transfer data, a bus master inserts the information including address information and data in a series of individual word transfers over the bus. Words usually contain 32 bits and the duration of the word transfer is determined by the nature of the bus protocol. Latency in processing the address information and coordinating the transfer to/from the proper devices is a significant problem. If there are more than a few bus masters, contention for the shared resource (the bus) becomes a major problem, resulting in long wait times to gain mastership of the bus.
Also, capacitive loading on a bus due to the plurality of attached modules increases the propagation delay, which also impacts the data transfer rate. Capacitive loading also decreases the impedance of a bus line to a very low value, and results in high currents required to drive the bus at full speed. Improperly terminated bus lines result in multiple reflections of the transmitted signal. The reflections take one or more bus round trip delays to settle, resulting in a settling time delay that is a significant portion of the transfer cycle time for a bus.
The aforementioned problems limit the bandwidth of bus communications. In addition to low bandwidths, electronic busses lack multiple independent channels and cannot provide the parallelism required by large-scale parallel computing and communication systems. The busses are not scalable to interconnect hundreds of plug-in modules since the increasing capacitance, inductance and impedance problems place a limit on the data transfer speed, and the fact that the single channel is shared among many processing modules results in contention for the single “bottleneck” resource.
A “local area network” (LAN) is a means of interconnecting multiple computers. A variety of standards exist, with the most popular perhaps being the family of “Ethernet” standards (ANSI/IEEE standard 802.3 and others). Like a computer system bus, an Ethernet network consists of a shared medium (coaxial cable) over which all data is transferred. LANs typically have lower bandwidth than system busses, but allow nodes to communicate at larger distances. Several Ethernet standards exist, with data transfer rates of 10 Mbps (millions of bits per second), 100 Mbps and 1 Gbps. Nodes may be separated by distances of up to 100 meters using Ethernet, which is much greater than system bus dimensions that are typically a fraction of a meter.
In recent years, computer system and LAN equipment designers have begun using several techniques for increasing the throughput of data communications. The first is the use of “switched networks,” also called “switch fabrics,” to eliminate the contention for the single shared resource of a bus or shared-medium LAN. The second is the use of fiber optics to increase the clock speed, and hence the throughput, of data transfers.
In a switched network, the single shared medium is replaced by a series of switches that are interconnected with each other and to the computing nodes (the communication endpoints). All these connections are now point-to-point and usually unidirectional, which allows them to be clocked at a higher rate than comparable bussed connections due to lower capacitance and higher impedance, an additional advantage for electronic implementations. The primary advantage of switched networks is that one pair of nodes can communicate simultaneously with a second pair of nodes, as long as the two pairs do not use the same node-to-switch or switch-to-switch connections. Switched fabrics can also scale to hundreds or thousands of nodes, since all connections are point-to-point and capacitance does not grow linearly with the number of nodes.
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Boggess Timothy P.
Trezza John A.
Maine & Asmus
Negash Knife-Michael
Teraconnect Inc.
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