Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2000-10-25
2004-04-13
Chen, Kin-Chan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S719000
Reexamination Certificate
active
06719808
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. More particularly, the present invention relates to a method of selectively etching a layer using a polysilicon hard mask, and to an apparatus for etching away the polysilicon hard mask, in manufacturing a semiconductor device.
2. Description of the Related Art
The increasing demand for highly integrated, high-capacity and high-performance semiconductor devices has fueled the need for advances in semiconductor integrated circuit manufacturing technology. The manufacturing of integrated circuits typically involves selectively etching a variety of material layers to form openings such as contact holes or trenches. To produce an integrated circuit having a high integration density, the openings in the material layers must be formed by a wafer processing technique for creating a fine pattern having a line width on the order of several micrometers at most. Research and development in the area of such a technique, with the aim of forming deeper and smaller openings, has concentrated on so-called dry etching.
In a common etching technique used to form openings, such as contact holes, in a target layer on a semiconductor wafer, a photoresist pattern is formed on the target layer (for example, on an oxide layer), and the portions of the target layer which are exposed by the photoresist pattern are dry etched using the photoresist pattern as an etching mask. The smaller the desired contact holes, the lower the etching rate must be. Because the thickness of the photoresist pattern can dictate the etching rate, the photoresist pattern to be used as an etching mask must be thick if the contact holes are to be small. For instance, for a 280 nm metal contact, if an oxide layer to be dry etched has a thickness of about 1.5 &mgr;m, a photoresist pattern having a relatively high thickness of about 1.6 &mgr;m is required.
However, future generation photolithography processes use an ArF eximer laser. On the other hand, a photoresist layer having a thickness of 300 nm or more is not sensitive to light of the wavelength produced by an ArF laser. Therefore, the typical photoresist is impractical for use in forming small contact holes.
Thus, a hard mask formed of polysilicon, Al
2
O
3
, Si
3
N
4
or SiON must be used in forming deeper and smaller contact holes. Of these masks, the one of polysilicon is now widely being used.
In a conventional manufacturing technique using a hard mask of polysilicon, after the polysilicon mask is used in the etching process, the mask is stripped by chemical mechanical polishing (CMP), wet etch back, or dry etch back processes.
However, stripping the polysilicon hard mask using CMP is costly and CMP cannot completely remove the hard mask due to steps on the wafer. The wet etch back technique exhibits a good etching selectivity with respect to other layers, but it can cause damage during a drying step after the etching process. In addition, the etchant used in the wet etch back technique can penetrate to other non-target layers, whereby the other layers are inadvertently etched.
The conventional dry etching process employed in removing the polysilicon hard mask is relatively simple. However, the etch selectivity with respect to other non-target layers is not very good. Therefore, a non-target material layer can be removed along with the hard mask during the stripping process. In particular, if pads or conductive layers exposed through the contact holes formed by the dry etching are of the same material as the polysilicon hard mask, e.g. are of the same polysilicon, single crystal silicon or metal silicide, the pads or the conductive layers can be removed when the hard mask is stripped from the target layer.
SUMMARY OF THE INVENTION
It is an object of the present invention to solve the above-described problems of the prior art.
More specifically, a first object of the present invention is to provide a method of manufacturing a semiconductor device, in which a polysilicon hard mask used for forming openings in a semiconductor wafer can be removed easily and at low cost without adversely affecting material layers left exposed by the openings.
Another object of the present invention is to provide an apparatus for manufacturing a semiconductor device, by which a hard mask only can be removed from a semiconductor substrate even after a layer of the same material as the hard mask is left exposed by openings formed using the hard mask.
The objects of the present invention are achieved by a method and apparatus in which an etching gas, used to strip the polysilicon hard mask after the mask has been used to form openings in a target layer on a semiconductor substrate, is supplied in a direction substantially parallel to the major upper surface of the semiconductor substrate.
The semiconductor substrate is mounted to a chuck within a reaction chamber. A gas injection unit in the form of a shower head mounted to the inner sidewall of the reaction chamber is used to supply the etching gas into the chamber in the direction parallel to the major surface of the semiconductor substrate. The chuck is preferably a spin chuck. The semiconductor substrate is rotated by the spin chuck while the polysilicon hard mask is exposed to the etching gas, whereby the etching gas is distributed uniformly to ensure a uniform dry etching of the polysilicon hard mask.
The etching gas preferably comprises a halogen fluoride compound selected from the group consisting of ClF, ClF
3
, BrF, BrF
3
, BrF
5
, IF, IF
3
and IF
5
or a flourine-containing compound such as XeF
2
. Moreover, the etching gas can be supplied using a carrier gas, such as nitrogen or argon. The dry etching of the polysilicon hard mask can be carried out at a pressure of only several tens of mTorr or less, and at room temperature.
Moreover, the process gas is preferably supplied into the reaction chamber as a series of pulses of a predetermined period. A puff valve connected in-line between a gas supply unit and the reaction chamber, and in particular, between the gas supply unit and the gas injection unit, is operative to supply the etching gas into the reaction chamber as a series of pulses.
According to the present invention as summarized above, the mean free path of the etching gas in the lateral direction of the semiconductor substrate is significantly longer than that of etching gas conventionally supplied perpendicular to the major upper surface of a semiconductor substrate. Therefore, even if the layer exposed in the openings in the polysilicon hard mask is of a silicon-containing material, the polysilicon hard mask can be effectively removed without damaging that silicon-containing layer.
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Ahn Tae-hyuk
Kim Ji-soo
Lee Won-seok
Park Wan-jae
Chen Kin-Chan
Samsung Electronics Co,. Ltd.
Volentine & Francos, PLLC
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