High-capacitance photodiode

Details High-capacitance photodiode High-capacitance photodiode

2002-02-12

2004-01-13

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Electromagnetic or particle radiation

C257S461000, C257S072000, C257S225000, C257S257000, C257S258000, C257S291000, C257S292000, C257S290000

Reexamination Certificate

active

06677656

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to monolithic image sensors intended for being used in image pick up devices such as, for example, cameras, camcorders, digital microscopes, or digital photographic cameras. More specifically, the present invention relates to images sensors based on semiconductors including a single storage and photodetection element.
2. Discussion of the Related Art
FIG. 1
partially illustrates a portion of a line of an array of an image sensor. With each line in the array are associated a precharge device and a read device. The precharge device is formed of an N-channel MOS transistor M
1
, interposed between a supply rail Vdd and an end-of-line node I. The gate of precharge transistor M
1
is adapted to receive a precharge control signal Rs. The read device is formed of the series connection of two N-channel MOS transistors. The drain of a first one of these read transistors, hereafter, M
2
, is connected to supply rail Vdd. The source of the second read transistor M
3
is connected to input terminal P of an electronic processing circuit. The gate of first read transistor M
2
is connected to end-of-line node I. The gate of second read transistor M
3
is adapted to receiving a read signal Rd. The line includes a plurality of photodiodes. In
FIG. 1
, a single photodiode D
2
, the closest to node I, is shown. Node I is associated with a charge storage diode D
1
. The anode of each diode D
1
, D
2
. . . is connected to a reference supply rail or circuit ground GND. The cathode of diode D
1
is directly connected to node I. Then, the cathodes of two consecutive diodes D
1
and D
2
are separated by a charge transfer N-channel MOS transistor, such as transistor M
4
between diodes D
1
and D
2
. The gate of transfer transistor M
4
is adapted to receive a charge transfer signal T. The operation of this circuit is the following.
A photodetection cycle starts with a precharge phase during which a reference voltage level is imposed to diode D
1
. This precharge is performed by maintaining second read transistor M
3
off and by turning on precharge transistor M
1
. Once the precharge has been performed, precharge transistor M
1
is turned off. Then, the system is maintained as such, all transistors being off.
A given time after the end of the precharge, the state at node I, that is, the real reference charge state of diode D
1
is read. To evaluate the charge state, second read transistor M
3
is turned on for a very short time &dgr;t.
The cycle continues with a transfer to node I of the photogenerated charges, that is, the charges created and stored in the presence of a radiation, in upstream photodiode D
2
. This transfer is performed by turning transfer transistor M
4
on.
Once the transfer is over, transistor M
4
is turned off and photodiode D
2
starts photogenerating and storing charges which will be subsequently transferred back to node I.
Simultaneously, at the end of the transfer, the new charge state of diode D
1
is read. The output signal transmitted to terminal P then depends on the channel pinch of first read transistor M
2
, which directly depends on the charge stored in the photodiode.
Once the reading is over, transistor M
3
is turned off and the cycle starts again with a precharge of diode D
1
.
FIG. 2
illustrates, in a partial simplified cross-section view, a monolithic forming of the assembly of a photodiode D
2
and of transfer transistor M
4
of FIG.
1
. These elements are formed in a same active area of a semiconductor substrate
1
of a first conductivity type, for example, of type P, which is lightly doped (P−). This substrate for example corresponds to an epitaxial layer on a silicon wafer. The active area is delimited by field insulating layers
2
, for example made of silicon oxide (SiO2) and corresponds to a well
3
of the same conductivity type as underlying substrate
1
, but more heavily doped. Above the surface of well
3
is formed an insulated gate structure
4
possibly provided with lateral spacers. On either side of gate
4
, at the surface of well
3
, are located source and drain regions
5
and
6
of the opposite conductivity type, for example, N. Drain region
6
, to the right of gate
4
, is heavily doped (N+). Source region
5
is formed on a much larger surface area than drain region
6
and forms with underlying substrate
3
the junction of photodiode D
2
. Gate
4
and drain
6
are solid with metallizations (not shown) which enable putting in contact these regions with transfer control signal T and the gate of transistor M
2
(node I), respectively. The structure is completed by heavily-doped P-type regions
8
and
9
(P+). Regions
8
and
9
, underlying areas
2
, are connected to the reference or ground voltage via well
3
and substrate
1
. Photodiode D
2
is of the so-called completely depleted type and includes, at the surface of its source
5
, a shallow very heavily-doped P-type region
7
(P+). Region
7
is in lateral (vertical) contact with region
8
. It is thus permanently maintained at the reference voltage level.
FIG. 3
illustrates the voltage levels of the various regions of FIG.
2
. The curve in full line illustrates the system state after a transfer, after transistors M
4
and M
1
have been turned on. Photodiode D
2
reaches a so-called depletion quiescent level VD determined by the sole characteristics of the diode, as will be explained in further detail hereafter. Heavily-doped P-type regions
7
,
8
, and
9
are continuously maintained at the reference or ground voltage, for example, 0 V. Channel region
3
of transistor M
4
is at a voltage Vdd-VT. Region
6
(node I) is at Vdd. When transistor M
4
is off, its channel region switches to 0 V (dotted line). Region
5
of photodiode D
2
then forms a voltage well, which fills up (dotted line) according to the lighting of this photodiode. Then, when transistor M
4
turns back on (transistor M
1
being maintained off), the charges accumulated in region
5
are transferred to region
6
, the voltage of which varies (dotted line).
The use of a photodiode D
2
(
FIGS. 1
,
2
) of completely depleted type enables suppressing or eliminating any noise at the level of photodiode D
2
. For this purpose, the doping profiles are chosen so that region
5
, pinched between surface region
7
and underlying substrate
3
, is depleted. Voltage VD in depletion state, that is, in the absence of any radiation, is adjusted only by the doping of regions
7
,
5
, and
3
. This voltage is chosen, as illustrated in
FIG. 3
, at a value smaller than the channel voltage of transfer transistor M
4
during the transfer of charges from the photodiode to node I.
A disadvantage of such photodiodes is the fact that their capacitance is relatively low. This is particularly disadvantageous with the decrease in supply voltages Vdd in CMOS technologies. Indeed, a supply reduction from 5 to 3.3 V imposes setting the depletion voltage VD of photodiode D
2
to approximately 1 V. The capacitance associated with this diode then is too low to obtain sufficient dynamics.
SUMMARY OF THE INVENTION
The present invention thus aims at providing a photodiode having an increased capacitance.
To achieve this and other objects, the present invention provides a photodetector made in monolithic form, of the type including a photodiode, a precharge MOS transistor, a control MOS transistor, a read MOS transistor, and a transfer MOS transistor, the photodiode and the transfer transistor being formed in a same substrate of a first conductivity type, the photodiode including a first region of the second conductivity type formed under a second region of the first conductivity type more heavily doped than the first region, and above a third region of the first conductivity type more heavily doped than the substrate, the first region being the source of the second conductivity type of the transfer transistor, the second and third regions being connected to the substrate and being at a fixed voltage.
According to an embodim

Affiliated with

Also associated with

Rating

High-capacitance photodiode does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High-capacitance photodiode, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-capacitance photodiode will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3259298