Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2002-08-29
2004-01-13
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257S349000
Reexamination Certificate
active
06677190
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates in general to semiconductor devices and, more particularly, to a self-aligned body contact in a semiconductor device.
BACKGROUND OF THE INVENTION
In integrated circuit fabrication, conductive contacts are often formed to connect particular regions or components of the integrated circuit. For example, such conductive contacts may be used to apply a voltage to a particular region or component of the integrated circuit. In some applications, it is desirable to control the voltage of the channel, or body region, below the gate of a transistor structure. For example, it may be desirable to control the body voltage of the body in order to control the threshold voltage of the transistor in order to reduce leakage current in a memory array.
In order to control the body voltage, a conductive path must be formed from the source of the current to the body of the transistor structure. For example, a contact to the body may be formed during fabrication of the transistor structure.
SUMMARY OF THE INVENTION
In accordance with the present invention, a self-aligned body contact in a semiconductor device is provided that substantially eliminates or reduces the disadvantages and problems associated with previously developed body contacts.
According to one embodiment, a method of forming an electrical contact is provided. The method includes forming a gate dielectric layer adjacent a body region of a transistor structure and forming a layer of dielectric material at least partially defining a trench adjacent the body region. The method further includes forming a conductive layer extending into the trench. The method further includes removing a region of the portion of the conductive layer extending into the trench to expose a region of the gate dielectric layer. The method further includes removing the exposed region of the gate dielectric layer to expose a contact portion of the body region. The method further includes filling the trench with a gate material such that a contact portion of the gate material is in direct contact with the contact portion of the body region.
According to another embodiment, another method of forming an electrical contact is provided. The method includes forming a gate dielectric layer adjacent a body region of a transistor structure and forming a layer of dielectric material at least partially defining a trench adjacent the body region. The method further includes forming a layer of gate material extending into the trench. The method further includes removing a region of the gate material extending into the trench to form a cavity and expose a region of the gate dielectric layer. The method also includes removing a portion of the gate dielectric layer to expose a contact portion of the body region. The method further includes filling the cavity with a contact material such that a contact portion of the contact material is in direct contact with the contact portion of the body region.
According to yet another embodiment, a semiconductor device is provided. The semiconductor device comprises a body region adjacent at least one active region, a gate proximate the body region, and a gate dielectric layer. The gate dielectric layer is disposed between the gate and the body region such that a first portion of the body region is separated from a first portion of the gate and a second portion of the body region is in direct contact with a second portion of the gate.
Various embodiments of the present invention may benefit from numerous technical advantages. It should be noted that one or more embodiments may benefit from some, none, or all of the advantages discussed below.
One technical advantage of the invention is that a gate-to-body contact in a transistor structure may be self-aligned with the trench used to form the transistor gate, such as a transistor gate formed using a damascene process. This provides an advantage over other contacts that are often difficult to align as desired.
Another technical advantage is that in some embodiments, the gate-to-body contact is formed entirely within the gate region and thus takes up little or no additional space in the transistor structure or integrated circuit, which saves valuable space in the integrated circuit. This may reduce the size and/or cost of fabricating an integrated circuit having one or more gate-to-body contacts. Thus, the gate-to-body contact formed within the gate region provides an advantage over contacts that are formed outside the gate region.
Another technical advantage is that sidewalls may be formed in order to provide separation between the gate-to-body contact and the active source and drain regions. This may reduce or eliminate the possibility of electrical shorting caused by the active source or drain regions.
Still another technical advantage is that a general body contact may be formed which may be used to connect the body region of the transistor structure to various components of the transistor structure or the integrated circuit in which the transistor structure is formed. The body contact may be self-aligned with the trench used to form the transistor gate. In addition, the body contact may be formed entirely within the gate region, which may reduce the size and/or fabrication costs of an integrated circuit utilizing one or more body contacts, as discussed above.
Other technical advantages will be readily apparent to one having ordinary skill in the art from the following figures, descriptions, and claims.
REFERENCES:
patent: 5962895 (1999-10-01), Beyer et al.
patent: 6387739 (2002-05-01), Smith, III
patent: 6509613 (2003-01-01), En et al.
Hoang Quoc
Nelms David
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