Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-12-31
2004-07-13
Booth, Richard A. (Department: 2812)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
Reexamination Certificate
active
06762459
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to reduced-dimension MOS field effect transistors and to the formation of field effect transistors having narrow gate electrodes and reduced dimension source-drain structures.
DESCRIPTION OF THE PRIOR ART
Field-effect transistors, generally referred to as FETs or MOSFETs, are common devices in modern integrated circuits. MOS is the acronym for “metal-oxide-semiconductor,” which now encompasses both metal and polysilicon as the gate material.
The basic components of an MOS transistor are: a source that serves as a current input; a drain that serves as a current output; a channel that selectively couples the source and the drain; and a gate that controls the conductivity of the channel. When a forward voltage bias is applied between the source and the drain, the current flowing from the source to the drain, through the channel, is controlled by the gate voltage.
A halo implant, also called a “pocket implant,” has been used to reduce “punch through”, i.e., to limit lateral diffusion of the source and the drain dopants in MOS transistors. The halo implant is of the conductivity type opposite to that of the source and drain of the MOS device. Like the source/drain implant, it is performed after the gate is defined and before the source/drain diffusion. Due to the masking effect of the gate, the halo implant peak concentration is near the source/drain region. Away from the source/drain edge, under the gate, the depth of the peak halo concentration falls quickly.
To provide a halo implant which extends slightly under the gate, high angle ion implantation is used to form the halo implant. Typically, the ion flux is at an implant angle of approximately 30°, or greater, from normal (perpendicular) to the substrate.
With close packing of devices, shadowing tends to occur due to the large angle employed. Shadowing results from the interference of an adjacent device gate, or other raised feature, with the path of the large angle, ion flux. To avoid the implant shadowing, devices may be spaced further apart. This results in fewer devices being accommodated on a wafer.
There remains a need for a method of halo implantation which overcomes the above-referenced problems, and others.
SUMMARY OF THE INVENTION
In accordance with aspects of the present invention, an MOS device and its method of fabrication are provided. The method includes forming a gate structure with an upper layer of a hard mask material on a substrate. The method further includes etching the hard mask material to remove a portion of the hard mask material and form a contoured mask on the gate structure. The contoured mask varies in thickness across the gate structure. Further, the method includes implanting a halo dopant through the contoured mask into the substrate to form a halo implant.
In accordance with another aspect of the present invention, a method of forming a MOS transistor is provided. The method includes growing a gate oxide layer on a surface of a silicon substrate and depositing a layer of polysilicon on the gate oxide layer. The method further includes forming a layer of a hard mask material on an upper surface of the polysilicon and anisotropically etching the hard mask material to contour the hard mask material. A halo dopant is then implanted into the substrate through the contoured hard mask material at an implant angle which is generally perpendicular to the surface of the substrate to form a halo implant.
REFERENCES:
patent: 5580804 (1996-12-01), Joh
patent: 5631490 (1997-05-01), Dutta et al.
patent: 5650340 (1997-07-01), Burr et al.
patent: 5744372 (1998-04-01), Bulucea
patent: 5939899 (1999-08-01), Frommer et al.
patent: 6194278 (2001-02-01), Rengarajan
patent: 6248635 (2001-06-01), Foote et al.
patent: 6362052 (2002-03-01), Rangarajan et al.
patent: 6458656 (2002-10-01), Park et al.
Choi Seungmoo
Cwynar Donald Thomas
Doyle Timothy Edward
Llevada Felix
Shive Scott Francis
Agere Systems Inc.
Booth Richard A.
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