Method of manufacturing and structure of semiconductor...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S344000, C257S493000

Reexamination Certificate

active

06730962

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates generally to semiconductor devices and, more specifically, to a semiconductor device with a field oxide structure and a method of manufacturing the same.
BACKGROUND OF THE INVENTION
Many high power applications require the use of high voltage semiconductor devices, such as a drain extended metal oxide semiconductor (DEMOS), because of their lower specific resistance, faster switching speed and lower gate drive power dissipation than their bipolar counterparts. Certain important characteristics of a DEMOS include its specific resistance, its breakdown voltage as well as its safe operation area (SOA). It is desirous to have a lower specific resistance and a higher breakdown voltage. The breakdown voltage of a DEMOS may be improved by adjusting the drift region of the device. A semiconductor device having a drift region with a doping concentration that increases towards the drain region would have a higher breakdown voltage.
In some conventional semiconductor devices, the drift region has a uniform doping concentration between a gate electrode and a drain implant of the device. Furthermore, the formation of some conventional semiconductor devices are susceptible to misalignment in silicide block and drain implant masking steps, which produce large variations in breakdown voltage and specific resistance.
SUMMARY OF THE INVENTION
The present invention provides a semiconductor device and method for manufacturing the same that substantially eliminates or reduces at least some of the disadvantages and problems associated with previously developed semiconductor devices and methods for manufacturing the same.
In accordance with a particular embodiment of the present invention, a method of forming a semiconductor device includes forming a body region of a semiconductor substrate and forming a drift region adjacent at least a portion of the body region. A dopant is used to form the drift region. In a particular embodiment, the dopant may comprise phosphorous. The method also includes forming a field oxide structure adjacent a portion of the drift region and a portion of a drain region. The field oxide structure is located between a gate electrode region and the drain region and is spaced apart from the gate electrode region. Atoms of the dopant accumulate adjacent a portion of the field oxide structure, forming an intermediate-doped region adjacent a portion of the field oxide structure. The method includes forming a gate oxide adjacent a portion of the body region and forming a gate electrode adjacent a portion of the gate oxide.
In accordance with another embodiment, a semiconductor device includes a body region of a semiconductor substrate and a drift region adjacent at least a portion of the body region. The drift region comprises a dopant. In a particular embodiment, the dopant may comprise phosphorous. The semiconductor device includes a field oxide structure adjacent a portion of the drift region and a portion of a drain region. The field oxide structure is located between a gate electrode region and the drain region and is spaced apart from the gate electrode region. The semiconductor device also includes an intermediate-doped region adjacent a portion of the field oxide structure. The intermediate-doped region comprises dopant atoms accumulated proximate the field oxide structure. The semiconductor device includes a gate oxide adjacent a portion of the body region and a gate electrode adjacent a portion of the gate oxide.
Technical advantages of particular embodiments of the present invention include a semiconductor device with a doping concentration that increases moving laterally from a drift region to a drain implant. Accordingly, the Kirk effect on the semiconductor device is suppressed and the safe operation area (SOA) of the device is improved.
Another technical advantage of particular embodiments of the present invention includes a semiconductor device having a field oxide structure adjacent a portion of a drain region. Thus, there is greater tolerance for misalignment during doping of a drain implant and a silicide block process. Accordingly, there is a reduced need for overdesign of the device with larger dimensions and reduced specific resistance.
Other technical advantages will be readily apparent to one skilled in the art from the following figures, descriptions and claims. Moreover, while specific advantages have been enumerated above, various embodiments may include all, some or none of the enumerated advantages.


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R. Zhu et al., Implementation of High-Side, High-Voltage Resurf LDMOS in a Sub-half Micron Smart Power Technology. Jun. 2001, Proceding of 2001 International Symposium on Power Semiconductor devices & ICs, pp. 403-406.*
C.Y. Tsai et al. 16-60V Rated LDMOS Show Advanced Performance in an 0.72 Micron Evolution BiCMOS Power Technology. 1997, IEEE, pp. 367-370.

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