Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-06-14
2004-03-30
Zarneke, David A. (Department: 2827)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S015000, C438S612000, C438S622000, C438S625000, C438S627000, C438S636000, C438S637000, C438S677000, C438S710000, C438S712000, C438S714000, C438S722000, C438S725000, C438S906000, C438S963000, C228S180210, C228S180220, C510S175000
Reexamination Certificate
active
06713376
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a contact element and a multi-layered wiring substrate, both of which form part of a wafer batch contact board that can be used to check or test, within only one step, numerous semiconductor devices on a wafer.
2. Description of the Related Art
Testing or checking numerous semiconductor devices on a wafer may be generally divided into a product test (electric property test) carried out by means of a probe card, and a burn-in test for assuring reliability after the product test.
Here, the bum-in test is a sort of screening test for removing semiconductor devices with inherent defects, or devices which cause failure due to irregularity in manufacturing process and depending on time and stress. In fact, the burn-in test may be referred to as a heat accelerating test, which is different from the device electric property test using a probe card.
The burn-in test is usually conducted after the electric property test which is performed for each chip by means of a probe card. In the burn-in test, a wafer is cut into chips through dicing process, and the test is performed for each package containing the chips. Thus, such a burn-in test may be called one chip burn-in system and is high at its cost. In order to solve this problem, there has been developed and put into practical use a wafer batch contact board (burn-in board) which can be used to carry out a burn-in test of numerous semiconductor devices formed on a wafer (Japanese Unexamined Patent Application Publication No. 7-231019) in only one step. A wafer batch burn-in system using the wafer batch contact board is considered to be an important technique, since it can be carried out at a low cost and is useful for putting into practical use a recently developed new techniques called bare chip shipping and bare chip mounting.
The wafer batch contact board is different from a conventional probe card, since the wafer batch contact board has higher requirements than those of the conventional probe card. This is because the wafer batch contact board can be used to check numerous chips formed on a wafer in only one step and can also be used in a heating test. If the wafer batch contact board is put into practical use, it is possible to carry out, on the base of wafer batch, the product examination (electric property test) formerly conducted by means of a conventional probe card.
FIG. 1
is an explanatory view showing in detail an example of the wafer batch contact board.
The wafer batch contact board, as shown in
FIG. 1
, comprises a multi-layered wiring substrate
20
for use in a wafer batch contact board (hereinafter, it is simply referred to as multi-layered wiring substrate), and a contact element
10
fixed on the multi-layered wiring substrate
20
through an anisotropic electrically conductive rubber sheet
30
.
The contact element
10
has a contact portion for directly contacting an examined element. Specifically, the contact element
10
is located in the vicinity of an insulating film (membrane)
12
, on one side of which there are formed a plurality of bumps
13
, on the other side of which there are formed a plurality of pads
14
. In particular, the insulating film
12
is spread over a ring
11
having a low coefficient of thermal expansion so as to avoid a dislocation which will possibly be caused due to a thermal expansion. The bumps
13
are provided in positions corresponding to the pads formed on the edge or center lines of all semiconductor devices (chips) on the wafer
40
(one chip has approximately 600 to 1000 pins, so that the number of the pads formed on the wafer are equal to a number calculated by multiplying the above number of the pins with the total number of the chips). In this way, the same number of the bumps
13
are located in positions corresponding to the positions of the pads
14
(having the same number as the bumps
13
).
The multi-layered wiring substrate
20
has a wiring structure formed on an insulating substrate for supplying a predetermined burn-in test signal through the pads
14
to various bumps
13
independently located on the membrane
12
. However, since the wiring structure on the multi-layered wiring substrate
20
is relatively complex, a plurality of wiring layers have to be laminated one upon another through a plurality of commonly used insulating films. Further, the multi-layered wiring substrate
20
employs an insulating substrate having a low coefficient of thermal expansion, so that it is possible to avoid a connection failure which will otherwise be caused due to a positional deviation (caused by thermal expansion) relative to the pads
14
on the membrane
12
.
The anisotropic electrically conductive rubber sheet
30
is made of an elastomer (consisting of a silicon resin, with metallic particles buried in the electrode portions of the pads along their electrically conducting directions) having an electric conductivity in only directions which are perpendicular to the main surface thereof. Specifically, the anisotropic electrically conductive rubber sheet
30
is connected with terminals (not shown) formed on the multi-layered wiring substrate
20
and the pads
14
formed on the membrane
12
. In particular, the anisotropic electrically conductive rubber sheet
30
, by virtue of projections (not shown) formed on the surface thereof, can get in contact with the pads
14
formed on the membrane
12
, so that it is possible to absorb some concave and convex portions on the surface of the semiconductor wafer
40
and irregularities in the height of the bumps
13
, thereby ensuring an exact connection between the pads formed on the semiconductor wafer and the bumps formed on the membrane
12
.
A contact element partially forming the above-described wafer batch contact board, as shown in
FIG. 2A
, may be produced by at first forming a laminated body
4
including an insulating film
1
(made of polyimide or the like) and an electrically conductive layer
2
(made of copper or the like). Then, an excimer laser is used to perform a laser treatment to form a plurality of bump holes
1
a
extending from the surface of the insulating film
1
to the electrically conductive layer
2
. Afterwards, one of plating electrodes is connected to the electrically conductive layer
2
so as to carry out an electrolytic plating of Ni or the like. In this way, as shown in
FIG. 2B
, the plating material will grow to fill the bump holes
1
a
, and once the plating material reaches the surface of the polyimide film
1
, it will spread equally in every direction around each bump hole
1
a
, thereby forming a plurality of bumps
3
consisting of hard Ni alloy.
However, an insulating resin film usually has a water rejection property and thus is not easy to be wetted by water. Moreover, since each of the bump holes has an extremely small diameter and since the bump holes are considerably deep, it is difficult for the plating liquid to reach the bottom of each bump hole. If the plating liquid fails to completely fill the bump holes by arriving at the bottoms thereof, the desired bumps will not grow or the growth is not acceptable. As a result, products containing ungrown bumps or improperly grown bumps have to be deemed as defective products.
Moreover, in the case where the surface of the insulating film is difficult to be wetted by the plating liquid, air bubbles are likely to attach to the surface of the insulating film. In fact, such kind of air bubbles are not easy to be removed once they have attached to the surface of the insulating film. Consequently, if the bumps grow under a condition in which the air bubbles have been attached to the surface of the insulating film, some bumps in the vicinity of air bubbles will grow but will avoid air bubbles, hence causing defects such as deformed bumps.
In order to reduce ungrown bumps or improperly grown bumps and to reduce defects such as deformed bumps, there has been suggested an improved method which will be described in the following. Na
Hoya Corporation
Sughrue & Mion, PLLC
Zarneke David A.
LandOfFree
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