Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-07-13
2004-01-20
Hoang, Huan (Department: 2818)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06681375
ABSTRACT:
RELATED APPLICATION DATA
The present application claims priority to Japanese Application No. P2000-213153 filed Jul. 23, 2000, which application is incorporated by reference to the extent permitted by law.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a check system for a wiring structure of a printed circuit board, and particularly relates to the check system for the wiring structure of the printed circuit board for deciding a wiring layer on which a signal wiring is disposed according to an amount of an electric energy owned by the signal wiring connecting high-speed operating ICs on the circuit board.
2. Description of the Related Art
Conventionally, in the printed circuit board used for recent electronic equipments, a signal of a general digital electronic device includes pulse waves, and it is well known that the electric energy can be calculated based on a rising time and a voltage of the pulse wave.
In this case, a transmission mode of a surface layer wiring is mainly a micro-strip structure. In the case of the micro-strip structure, in addition to a small propagation delay by a dielectric material, a distributed capacity between the wiring and ground planes (image planes) nearest to the wiring is small, so that there is an advantage that the propagation is conducted at higher speed than a strip wiring (hereinafter referred to as a wiring structure, a generic name for a single strip wiring and a double strip wiring). However, on the occasion that a conductor, for example, a shield plate is made approached to the upper part of the micro-strip line, it is ascertained that characteristic impedance in wiring becomes extremely small and waveform is greatly distorted or dulled.
Furthermore, in the case of the strip structure, a leakage of the electric energy (RF (Radio Frequency) energy) radiated from the wiring to the outside is shut out by the upper and the lower ground (or electric power source) planes, but in the case of the micro-strip structure, the plane exists only on the one side, so that it is known that the electric energy is easily radiated to the outside of the circuit board.
However, in a circuit where a signal with the small electric energy (a low-speed digital signal, or a low voltage digital signal) is a mainstream, a radiation to the outside has not remarkably occurred so much. On the occasion that a multi-layer circuit board is used and also a wiring density is not so high, it has easily been possible to suppress a radiation noise by disposing (by making the strip structure) a signal having the large electric energy in an internal layer of the circuit board.
Incidentally, with a speedup of a circuit mounted on the recent printed circuit board, the number of high-speed signal lines is increased, and with miniaturization and multifunction, the wiring density has become high, so that it has become difficult to dispose all the signal lines having the large electric energy in the internal layer of the circuit board (strip structure). Therefore, there has arisen the need for devising to dispose wiring in the internal layer in order of higher priority by adopting prioritization.
However, there has been a problem that, for a large-scaled circuit with thousands of nets, it is impossible to know easily which signal line has the large electric energy.
SUMMARY OF THE INVENTION
The present invention has been made in view of the problems at the time of designing the aforesaid conventional printed circuit board. Accordingly, one of objects of the present invention is to provide a check system for a wiring structure of a printed circuit board for easily calculating an electric energy of a high-speed signal wiring provided on an electric power source plane intended for checking, and for being capable of warning on the occasion that the energy owned by the signal wiring is larger than a designated threshold value.
The present invention to solve the aforesaid problems provides a check system for a wiring structure of a printed circuit board for checking the wiring structure of wiring tentatively designed on the printed circuit board, and it is characterized to include; means for deciding object to extract in order a combination of a driver and a receiver out of a group of parts existing on the above wiring, and after extracting a circuit information of the driver corresponding to one of the above combination, to decide if high-speed signal wiring whose voltage level exceeds a designated threshold value exists or not, according to evaluating result of a plurality of determination expressions including at least a part of the circuit information in valuables; means for outputting a first countermeasure instructing message on the occasion that the above high-speed signal wiring is a micro-strip wiring disposed in the neighborhood of the driver; means for outputting a second countermeasure instructing message on the occasion that the above high-speed signal wiring is the micro-strip wiring disposed in the neighborhood of the receiver; and means for outputting a third countermeasure instructing message on the occasion that the above high-speed signal wiring is the micro-strip wiring disposed at a midpoint between the driver and the receiver.
Namely, the check system for the wiring structure according to the present invention is constituted to calculate by using a simple mathematical expression the electric energy of the high-speed signal wiring on the printed circuit board intended for checking, and to output a display for identifying the signal wiring on the occasion that the electric energy which the signal wiring has is larger than a certain designated threshold value, and also to output the instructing message against the signal wiring to relocate within the internal layer of the circuit board, so that it is made possible to greatly suppress radiation noises radiated from the signal wiring having the large energy without changing a conventional designing process and increasing a designing cost.
Furthermore, by being relocated within the internal layer (strip structure) of the circuit board, the signal wiring having the above large electric energy has no change in its characteristic impedance even when a conductor of a shield plate shape approaches. As a result, such phenomenon as a signal waveform running through the signal wiring is greatly distorted is prevented.
Other and further objects, features and advantages of the present invention will appear more fully from the following description.
REFERENCES:
patent: 5477460 (1995-12-01), Vakirtzis et al.
patent: 6418552 (2002-07-01), Osborn
patent: 2001/0018761 (2001-08-01), Sasaki et al.
Patent Abstracts of Japan Publication No. 10-049568 Published Feb. 20, 1998.
Patent Abstracts of Japan Publication No. 10-091663 Published Apr. 10, 1998.
Patent Abstracts of Japan Publication No. 2001-318961, Published Nov. 16, 2001.
Araki Kenji
Yokoyama Ayao
Depke Robert J.
Hoang Huan
Holland & Knight LLC
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