Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Isolation by pn junction only
Reexamination Certificate
2002-08-06
2004-03-02
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Isolation by pn junction only
C438S486000, C438S528000, C438S530000
Reexamination Certificate
active
06699771
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates generally to the field of semiconductor devices and, more particularly, to a method for optimizing junctions formed by solid phase epitaxy.
BACKGROUND
As semiconductor manufacturers continue to reduce the scale of semiconductor devices, the junction depth associated with the junction areas likewise tends to decrease. Conventional methods for activating a majority of the dopants within the junction areas of the semiconductor device typically require a high temperature anneal, which often leads to increased dopant diffusion from the junction areas. Methods to reduce the junction depth often result in an increase in semiconductor device sheet resistance and a lower semiconductor device drive current.
SUMMARY
In one method embodiment, a method of forming a semiconductor device comprises forming at least one amorphous region within an at least partially formed semiconductor device. The method also comprises implanting a halogen species in the at least one amorphous region of the at least partially formed semiconductor device. The method further comprises doping at least a portion of the at least one amorphous region to form at least one junction within the at least partially formed semiconductor device. The method also comprises activating the doped portion of the at least one amorphous region of the at least partially formed semiconductor device by solid phase epitaxial re-growth.
In one embodiment, a transistor is formed using a method. The method comprises implanting at least a halogen species within an at least partially formed semiconductor device to form at least one amorphous region. The method also comprises doping at least a portion of the at least one amorphous region to form at least one junction within the at least partially formed semiconductor device. The method further comprises activating the doped portion of the at least one amorphous region of the at least partially formed semiconductor device by solid phase epitaxial re-growth.
Depending on the specific features implemented, particular embodiments of the present invention may exhibit some, none, or all of the following technical advantages. Various embodiments minimize leakage current from the junction areas of the semiconductor device after solid phase epitaxial re-growth. Some embodiments may increase the gradient of boron concentration after solid phase epitaxial regrowth.
Other technical advantages will be readily apparent to one skilled in the art from the following figures, descriptions and claims. Moreover, while specific advantages have been enumerated above, various embodiments may include all, some or none of the enumerated advantages.
REFERENCES:
patent: 5407838 (1995-04-01), Ohnishi et al.
patent: 5885886 (1999-03-01), Lee
patent: 5994175 (1999-11-01), Gardner et al.
patent: 6069062 (2000-05-01), Downey
patent: 6521502 (2003-02-01), Yu
patent: 2002/0187614 (2002-12-01), Downey
Brady III W. James
Chaudhari Chandra
McLarty Peter K.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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