Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-06-12
2004-05-11
Fahmy, Wael (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S614000, C438S617000, C438S597000
Reexamination Certificate
active
06734092
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more specifically, it relates to a resin-sealed semiconductor device and a manufacturing method thereof.
With mobile apparatuses such as notebook computers having come to be used widely in recent years, resin-sealed semiconductor devices mounted in such apparatuses need to achieve a lower profile, further miniaturization and reduced weight. Accordingly, numerous resin-sealed semiconductor devices have been proposed in response to these technical requirements.
FIG. 4
illustrates an example of such a semiconductor device in the prior art. Wiring
104
constituted of copper (Cu) are electrically connected to electrode pads
102
formed at the primary surface of a semiconductor element
100
. Cu posts
106
having a height of approximately 150 micrometer are connected with the wiring
104
. Then, a resin layer
108
is formed at a height corresponding to the height of the Cu posts
106
for sealing. External connection terminals constituted of a metal such as solder balls
110
are formed at the tips of the Cu posts
106
that are exposed.
The process up to this point is implemented on a wafer with a plurality of semiconductor elements
100
arrayed thereon. Then, the wafer undergoes a dicing process to be divided into individual pieces. The resulting semiconductor devices are so-called chip-size package semiconductor devices whose size is very close to the size of the semiconductor elements.
During the process for manufacturing the device described above, a wafer comprising a plurality of semiconductor elements
100
is set at a mold die constituted of an upper die
112
and a lower die
114
, as illustrated in
FIG. 5
, to achieve sealing with a resin so as to completely cover the Cu posts
106
.
If foreign matter such as dirt is present inside the mold die at this time, the foreign matter may come into contact with the rear surfaces of the semiconductor elements
100
to scar them and even cause cracks
116
.
In addition, surface polishing is performed by using an abrasive material
118
, as illustrated in
FIG. 6
to expose the tips of the Cu posts
106
after the resin curing process.
During the polishing process, the wafer is vacuum held through vacuum holes.
122
formed at a polishing stage
120
to secure the wafer. However, if the wafer is warped, the vacuum hold may not be successful, which, in turn, may make it impossible to perform surface polishing.
Such warping of the wafer occurs due to the difference between the coefficient of expansion of the wafer (the semiconductor element
100
) and the coefficient of expansion of the resin layer
108
sealed thereupon. Such warping occurs to varying degrees depending upon the thickness of the resin layer
5
and the type of material used to constitute the resin layer
5
.
In addition, semiconductor devices achieved by forming a sealing resin layer at the rear surfaces of the semiconductor elements as well as at the primary surfaces have been proposed in recent years. However, there is a problem in that since the resin is injected at both surfaces, the total thickness of the resin layer increases.
SUMMARY OF THE INVENTION
By addressing the problems of the prior art discussed above, according to the present invention, the primary surface of a semiconductor element is sealed with a resin layer and protective tape is bonded to its rear surface.
REFERENCES:
patent: 5672912 (1997-09-01), Aoki et al.
patent: 6159837 (2000-12-01), Yamaji et al.
patent: 6187615 (2001-02-01), Kim et al.
patent: 6271127 (2001-08-01), Liu et al.
patent: 6472745 (2002-10-01), Iizuka
Ha Nathan W.
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
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