Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process
Reexamination Certificate
2002-01-16
2004-03-02
Park, Illooo (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output command process
C710S001000, C710S020000, C710S021000, C710S062000, C710S063000, C710S064000, C710S072000, C710S074000, C711S100000, C711S114000, C711S161000, C711S162000, C714S001000, C714S006130
Reexamination Certificate
active
06701385
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally, to host adapters that interface two I/O buses and more particularly, to implementing RAID 1 mirroring by a host adapter interfacing two I/O buses.
2. Description of Related Art
Host adapter integrated circuits were widely used for interfacing two I/O buses such as a host computer I/O bus and a SCSI bus. Frequently, a host adapter integrated circuit was used in a data storage system that implemented redundant data storage.
Redundancy is increasingly becoming a requirement for data storage systems. If one data storage device fails, the data on the failed data storage device preferably can be reconstituted or reconstructed using data content on other data storage devices in the data storage system.
The simplest scheme for providing data redundancy was mirroring of data storage devices where data written to one data storage device was also written on another data storage device. This mirroring scheme was also referred to as RAID 1. With mirroring, if one data storage device failed, the data content was retrieved from the mirror data storage device. As disk drive prices have fallen, the mirroring scheme has increased in popularity.
One implementation of data mirroring used a software manager to identify two data storage devices, such as SCSI disk drives, and to issue write commands for the same data to the two data storage devices. The software manager generated two data write commands, which in the simplest case differed only in the target data storage device specified. This mirroring scheme was implemented only at the software manager level. The data storage devices, host adapters and the corresponding management software required no modifications to support this data mirroring technique. To these devices, the data mirroring was not evident because the devices were simply processing routine write commands.
While this data mirroring technique is easily implemented, the technique generates additional traffic on the I/O bus between the device executing the software manager and the host adapter for example. Frequently, this I/O bus is the busiest bus in the data storage system and so additional traffic on this I/O bus further exacerbates any I/O bottlenecks associated with this I/O bus. Also, since two commands are generated for each write, the memory in the system executing the software manager must have the capability two store the two commands as well as any memory structures used in monitoring the processing of the two commands. There is a similar requirement for reading mirrored data. Also, in addition to executing the software manager, the system processor must execute instructions to build and monitor the execution of the duplicate commands required for the mirrored transaction. Thus, while data redundancy is desirable, it adversely affects system performance in several different respects, and in some cases may prevent the implementation of mirrored transactions.
SUMMARY OF THE INVENTION
According to one embodiment of the present invention a method for data mirroring by a host adapter integrated circuit includes receiving a single hardware I/O control block by the host adapter integrated circuit. The single hardware I/O control block specifies a data operation, either a read or a write operation, using a first data storage device. This method also includes analyzing the single hardware I/O control block by the host adapter integrated circuit to determine whether the single hardware I/O control block specifies a mirrored transaction using a second data storage device.
In analyzing the single hardware I/O control block, the host adapter integrated circuit determines whether a pointer in a first field of the single hardware I/O control block is valid. If the pointer in the first field is valid, the host adapter integrated circuit generates a second hardware I/O control block. The second hardware I/O control block specifies the operation using the second storage device.
The method also includes executing the first hardware I/O control block and the second hardware I/O control block independently by the host adapter integrated circuit. For a write operation, the host adapter integrated circuit posts as complete only a last of the first and second hardware I/O control blocks to complete executing. For a read operation, when execution of one of the first and second hardware I/O control blocks is complete, the host adapter sets an abort bit in the other of the hardware I/O control blocks. Upon the target associated with the other of the hardware I/O control blocks acknowledging the abort, the host adapter posts as complete the first of the hardware I/O blocks to complete execution.
In another embodiment of the host adapter data mirroring process, a single hardware I/O control block is received by a host adapter integrated circuit. The single hardware I/O control block specifies a data operation using a first data storage device and includes a sister hardware I/O control block field. The host adapter integrated circuit generates another hardware I/O control block upon the sister hardware I/O control block field containing a valid hardware I/O control block identification number. The another hardware I/O control block specifies the data operation using a second data storage device and thereby mirrors the data. In one embodiment, the valid hardware I/O control block identification number is a pointer to a storage site in an array of hardware I/O control block storage sites.
This embodiment of the process places a hardware I/O control block identification number of the single hardware I/O control block in a sister hardware I/O control block field of the another hardware I/O control block. An invalid hardware I/O control block identification number is placed in the sister hardware I/O control block field of the single hardware I/O control block upon completion of execution of the another hardware I/O control block prior to completion of execution of the single hardware I/O control block. Conversely, an invalid hardware I/O control block identification number is placed in the sister hardware I/O control block field of the another hardware I/O control block upon completion of execution of the single hardware I/O control block prior to completion of execution of the another hardware I/O control block. In either situation, completion of execution of only one of the single hardware I/O control block and the another hardware I/O control block is reported.
Hence, in the process of this invention, a hardware I/O control block structure is stored in a memory. The hardware I/O control block structure includes a sister hardware I/O control block field and a target identification field. In one embodiment, the hardware I/O control block structure is one of a plurality of hardware I/O control block structures in the memory.
Thus, a hardware I/O control block memory array according to one embodiment of the present invention includes a first hardware I/O control block having a sister hardware I/O control block field, and a second hardware I/O control block having a sister hardware I/O control block field. The sister hardware I/O control block field of the first hardware I/O control block includes a pointer to the second hardware I/O control block and the sister hardware I/O control block field of the second hardware I/O control block includes a pointer to the first hardware I/O control block.
In yet another embodiment of the present invention, a memory contains processor instructions for a host adapter mirroring process, wherein upon execution of the processor instructions the host adapter mirroring process comprises:
receiving a single hardware I/O control block wherein the single hardware I/O control block specifies a data operation using a first data storage device; and
analyzing the single hardware I/O control block to determine whether the single hardware I/O control block specifies a mirrored transaction using a second data storage device.
In still yet another embodiment of the present invention, a memory
Adaptec, Inc.
Gunnison Forrest
Gunnison McKay & Hodgson, L.L.P.
Nguyen Tanh Q.
Park Illooo
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