High temperature deposition of Pt/TiOx for bottom electrodes

Coating processes – Electrical product produced – Condenser or capacitor

Reexamination Certificate

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Details

C427S080000, C029S025030, C029S025350, C029S025410, C029S025420

Reexamination Certificate

active

06682772

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method of manufacturing platinum bottom electrodes for ferroelectric capacitors. More particularly, the present invention relates to a method of manufacturing a platinum bottom electrode which provides a thermally stable substrate for subsequent PZT deposition and processing.
BACKGROUND OF THE INVENTION
Ferroelectric thin film capacitors that are used for ferroelectric memory applications can be switched between two polarization states with the application of an electric field. Upon switching between the two polarization states, a switching current is produced that can be sensed by an external circuit. In order to determine the memory state stored in the capacitor, the switching current must be sufficiently large so that it can be sensed by the accompanying sense circuit. For this reason, a large switchable polarization is desired for the ferroelectric capacitor.
During repeated polarization switching of the ferroelectric capacitor due to read and write operations, the switchable polarization is commonly reduced. This phenomenon is commonly known as fatigue. Fatigue will eventually result in a reduction of the ferroelectric switchable polarization to the point where the memory will fail. For this reason, it is necessary to produce capacitors that exhibit little or no fatigue.
In addition to having a high switchable polarization and a low fatigue rate, thin film ferroelectric capacitors must also be stable with respect to mechanical stress and thermal cycling. High thin film stresses can result in delamination between electrode/ferroelectric or electrode/substrate interfaces. Films that undergo microstructural changes due to exposure to high temperatures also can induce high film stress and can also adversely affect the growth of subsequent films and process reproducibility. If the films composing the ferroelectric capacitor exhibit high stresses or thermal instability, there is a high risk of delamination and variability during subsequent processing steps required for integration of the capacitor with CMOS circuitry. High film stress and thermal instability can also make the final memory more susceptible to long term failure.
SUMMARY OF INVENTION
It is an object of the present invention to improve the resistance of a ferroelectric capacitor to fatigue as compared to ferroelectric capacitors manufactured using standard prior art cold platinum bottom electrode deposition techniques.
It is a further object of the present invention to reduce the overall stress and to increase the thermal stability of a ferroelectric capacitor stack as compared to prior art ferroelectric capacitor stacks.
In accordance with the aforesaid objects, the present invention provides a means for reproducible control of ferroelectric PZT crystallographic texture and the corresponding switchable polarization. In this way, thermal stability and fatigue are improved and stress and platinum sheet resistance are reduced.
According to the present invention, a platinum deposition method uses a combination of an oxide adhesion layer and a high temperature thin film deposition process to produce platinum bottom electrodes for ferroelectric capacitors. The platinum bottom electrode is deposited onto a TiO
x
layer at temperatures between about 300 and 800° C. Deposition at high temperatures changes the platinum stress from compressive to tensile, increases platinum grain size, and provides a more thermally stable substrate for subsequent PZT deposition.


REFERENCES:
patent: 5443688 (1995-08-01), Toure et al.
patent: 5555486 (1996-09-01), Kingon et al.
patent: 5798903 (1998-08-01), Dhote et al.
patent: 5950292 (1999-09-01), Dimos et al.
patent: 6287637 (2001-09-01), Chu et al.

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