Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-12-19
2004-07-20
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S333000, C257S347000
Reexamination Certificate
active
06765263
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to a semiconductor device and a fabricating method thereof, and more particularly to a semiconductor device and a method for fabricating the same, which has a transistor of a vertical structure.
2. Description of the Prior Art
Generally, a transistor has a horizontal structure, in which a gate electrode or a source/drain region has a horizontal structure, thereby occupying large areas. Furthermore, in this transistor, a minimum design rule is severely restricted, a fabricating process is complex, and device characteristics are not much improved.
In order to improve these problems including the severe restriction on minimum design rule, the complex fabrication process and the unimproved device characteristics, transistors having a vertical structure other than the horizontal structure were recently proposed. However, such transistors having the vertical structure have a problem in that a fabricating process is also complex.
SUMMARY OF THE INVENTION
Accordingly, the present invention has been made to solve the above-mentioned problems occurring in the prior art, and an object of the present invention is to provide a semiconductor having a vertical transistor structure, and a method for fabricating the same, which allows a fabrication process to be simple.
To achieve the above object, in one aspect, the present invention provides a semiconductor device, which comprises: an insulating film formed on a silicon substrate; a first conductive well of a first conductive type formed in the inner region of the silicon substrate; a first conductive layer of a second conductive type formed on the first conductive type well; a second well of the first conductive type formed on the second conductive layer; a second conductive layer of the second conductive type formed on the second well of the second conductive type; a gate oxide film on the side of the second well of the first conductive type; and a gate electrode formed on the surface of the gate oxide film.
In another aspect, the present invention provides a method for fabricating a semiconductor device, which comprises the steps of: forming an insulating film on a silicon substrate; forming a first conductive well of a first conductive type on the insulating film; forming first and second conductive layers of a second conductive type at a portion below the surface of the first conductive well and in the inner region of the first conductive well, respectively; patterning the insulating film and the first conductive layer of the second conductive type, so that contact holes are formed in such a manner that the second conductive layer formed in the inner region of the first conductive well is exposed through the contact holes; forming a gate insulating film on the sidewall of the first conductive well in the contact holes; and forming a gate electrode on the surface of the gate insulating film in the contact holes.
Preferably, the method of fabricating the semiconductor device according to the present invention further comprises the steps of forming an insulating film for planarization on the entire structure, after forming the gate electrode; forming contact holes in the insulating film for planarization in such a manner that the first conductive layer of the second conductive type and the gate electrode are exposed through the contact holes; and forming conductive plugs in the contact holes in such a manner that the conductive plugs are connected to the first conductive layer of the second conductive type and the gate electrode, respectively.
In the method of the present invention, the step of forming the gate insulating film on the side of the first conductive well is preferably achieved by carrying out an oxidation process.
Additionally, in the semiconductor device and the fabricating method thereof according to the present invention, the thickness of the portion of the gate insulating film, which is grown on the sidewall of the first conductive well is preferably thinner than the thickness of the portion of the gate insulating film, which is grown on the first and second conductive layers of the second conductive-type.
Furthermore, in the present invention, the insulating film for planarization is preferably planarized by CMP treatment.
REFERENCES:
patent: 6232196 (2001-05-01), Raaijmakers et al.
patent: 6255182 (2001-07-01), Wieczorek et al.
patent: 2002/0140032 (2002-10-01), Cho et al.
Dongbu Electronics Co. Ltd.
Keefer Timothy J.
Seyfarth Shaw LLP
Wojciechowicz Edward
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