Method of forming a photodiode for an image sensor

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation

Reexamination Certificate

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Details

C438S060000, C438S071000, C438S514000, C438S561000

Reexamination Certificate

active

06723580

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an image sensor; and, more particularly, to a photodiode of a CMOS (Complementary Metal Oxide Semiconductor) image sensor where the photodiode is called a pinned photodiode or a buried photodiode.
DESCRIPTION OF THE PRIOR ART
Generally, a CMOS image sensor is an apparatus to convert an optical image into electrical signals and employs MOS (Metal Oxide Semiconductor) transistors. A CCD (Charge Coupled Device) image sensor, as a kind of image sensor, has been widely known. As compared with the CCD image sensor, the CMOS image sensor may be easily driven with the various scanning schemes and integrated with a signal processing circuit on one-chip. Therefore, the CMOS image sensor may miniaturize its size and reduce the fabricating cost by using a compatible CMOS technology and lower the power consumption.
Referring to
FIG. 1
, a conventional unit pixel of a CMOS image sensor is composed of a pinned photodiode (PPD) and four NMOS transistors. The four NMOS transistors include a transfer transistor
102
for transferring photoelectric charges generated in a pinned photodiode to a sensing node, a reset transistor
104
for resetting the sensing node in order to sense a next signal, a drive transistor
106
for acting as a source follower and a select transistor
108
for outputting data to an output terminal in response to an address signal.
The reset transistor
104
and the transfer transistor
102
are made up of a native NMOS transistor so that the charge transfer efficiency is improved. The native NMOS transistor having a negative threshold voltage can prevent electron losses from being generated by a voltage drop due to a positive threshold voltage and then contribute the charge transfer efficiency to be improved.
Referring to
FIG. 2
, the conventional unit pixel of the CMOS image sensor includes a P
+
silicon substrate
201
, a P-epi (epitaxial) layer
202
, a P-well region
203
, field oxide layers
204
, a gate oxide layer
205
, gate electrodes
206
, an N

diffusion region
207
, a P
0
diffusion region
208
, an N
+
diffusion region
209
and oxide layer spacers
210
. A pinned photodiode (PPD) has a PNP junction structure in which the P-epi
202
, the N

diffusion region
207
and the P
0
diffusion region
208
are stacked. Such a pinned photodiode includes two p-type regions, each of which has the same potential so that the N

diffusion region
207
is fully depleted at a pinning voltage.
Since the transfer transistor having the transfer gate Tx is made up of a native transistor, an ion implantation process for adjusting transistor characteristics (threshold voltage and punch-through characteristics) may be omitted in the p-epi layer
202
which acts as a channel beneath a transfer gate Tx. Accordingly, the NMOS transistor (native transistor) having a negative threshold voltage may maximize the charge transfer efficiency. The N
+
diffusion region
209
(the sensing node) is made up of a highly doped N
+
region between the transfer gate Tx and the reset gate Rx, thereby amplifying a potential of the sensing node according to an amount of transferred charges.
Since a doping concentration of the P-epi layer
202
is lower than that of the P
+
silicon substrate
201
, the p-epi layer
202
may increase a photosensitivity by increasing the depletion depth of the pinned photodiode. Also, the highly doped P
+
silicon substrate
201
beneath the P-epi layer
202
improves the sensor array modulation transfer function by reducing the random diffusion of the photoelectric charges. The random diffusion of charges in the P
+
silicon substrate
201
leads to the possible “miscollection” of the photoelectric charges by neighboring pixels and directly results in a loss of image sharpness or a lower modulation transfer function. The shorter minority carrier lifetime and higher doping concentration of the P
+
silicon substrate
201
significantly reduces the “miscollection” of photoelectric charges since the charges are quickly recombined before diffusing to the neighboring pixels.
Since the pinned photodiode is formed on a predetermined region of the P-epi layer
202
between the field oxide layer
204
and the transfer gate Tx, it is impossible that the pinned photodiode may increase its unit area without reducing a integration degree. Also, the pinned photodiode may not increase its unit area beyond a design rule. When the design rule of the CMOS image sensor is less than 0.25 &mgr;m, the photosensitivity and resolution of the CMOS image sensor is reduced.
BRIEF SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a photodiode of an image sensor that may increase a unit area of the photodiode while maintaining a constant integration degree, thereby increasing the photosensitivity of the photodiode.
In accordance with an aspect of the present invention, there is provided a photodiode used in CMOS image sensor for sensing light from an object, the photodiode comprising: an uneven surface for increasing an area of a PN junction of the photodiode, whereby the increased PN junction area improves the light sensitivity of the photodiode, a semiconductor layer of a first conductivity type; at least one trench formed in the semiconductor layer to a predetermined depth; a first diffusion region of the first conductivity type formed in sidewalls of the trench and at the bottom of the trench; and a second diffusion region of a second conductivity type formed beneath the first diffusion region, wherein a portion of the first diffusion region is directly in contact with the semiconductor layer.
In accordance with another aspect of the present invention, there is provided a photodiode used in CMOS image sensor for sensing light from an object, the photodiode comprising: an uneven surface for increasing an area of a PN junction of the photodiode, whereby the increased PN junction area improves the light sensitivity of the photodiode, a semiconductor layer of a first conductivity type; at least one protrusion protruded from a surface of the semiconductor layer; a first diffusion region of the first conductivity type formed beneath a surface of the protrusion; and a second diffusion region of a second conductivity type formed beneath the first diffusion region, extending to the surface of the semiconductor layer, wherein a portion of the first diffusion region is directly in contact with the semiconductor layer.


REFERENCES:
patent: 4961098 (1990-10-01), Rosbeck et al.
patent: 4984047 (1991-01-01), Stevens
patent: 5051797 (1991-09-01), Erhardt
patent: 5053837 (1991-10-01), Tonai
patent: 5831312 (1998-11-01), Wen
patent: 5841159 (1998-11-01), Lee et al.
patent: 6027955 (2000-02-01), Lee et al.
patent: 355124278 (1980-09-01), None
patent: 358060568 (1983-04-01), None
patent: 63168048 (1988-07-01), None

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