Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2002-03-22
2004-03-09
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S231000, C438S592000
Reexamination Certificate
active
06703297
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to methods of processing incorporating the use and removal of anti-reflective coating films.
2. Description of the Related Art
In a conventional process flow for forming a typical gate electrode stack used in field effect transistors, capacitors and other devices, an oxide layer is grown on a lightly doped silicon substrate and a layer of polysilicon is deposited on the oxide layer. The polysilicon layer and the oxide layer are then masked and anisotropically etched back to the upper surface of the substrate to define a gate electrode of polysilicon stacked on a gate dielectric layer of oxide.
The patterning of the polysilicon gate entails the formation of a photoresist mask on the deposited polysilicon film. A resist film is applied to the polysilicon layer and patterned into the desired shape for the poly gate/line. The resist patterning involves resist exposure followed by a stripping process. In the first step, the resist is exposed to light passed through a mask or reticle. The light changes the chemical properties of the resist, rendering the resist either soluble or insoluble in a solvent. The resist is then rinsed in the solvent to remove the soluble portions thereof. The exposure light is diffracted by passage through the reticle. As the diffracted light passes through the resist, some of the light rays are scattered while others strike underlying films and reflect upwards. The reflected light rays interfere with incoming rays and produce an interference pattern composed of a plurality of standing waves. The interference pattern can cause unwanted perturbations in the resist, such as stair-stepping and line width variations. The problem is more acute where the underlying film or films are highly reflective. Oxide and polysilicon represent two examples of such reflective films.
In order to reduce the deleterious effects of standing wave interference and light scattering produced by radiation reflected back from the substrate during photoresist exposure, an anti-reflective coating (“anti-reflective coating”) is commonly formed on the polysilicon layer prior to the polysilicon gate etch. Following anti-reflective coating deposition, photoresist is applied to the polysilicon layer and patterned, i.e., exposed and developed, to establish the desired pattern for the gate. The anti-reflective coating and the polysilicon layer are then anisotropically etched to define the gate. The photoresist is stripped and the remaining portion of the anti-reflective coating covering the gate is removed. If not removed, the anti-reflective coating may interfere with subsequent silicidation or contact formation.
Silicon oxynitride and silicon nitride are two materials frequently used for anti-reflective coating films. One conventional process of anti-reflective coating film removal involves a two-step acid bath dip process. Initially, the anti-reflective coating film is subjected to a hot bath of light concentration HF at about 65 to 85° C. Next, a dip in hot phosphoric acid is performed, again at about 65 to 85° C. If the composition of the anti-reflective coating is not anticipated to include oxide, then the HF dip is sometimes skipped.
A number of disadvantages are associated with conventional anti-reflective coating removal processing. To begin, the hot baths subject the substrate and the polysilicon lines to one or more thermal shocks. In sub-micron processing, such thermal shocks can lead to crystalline dislocations in the lattice structures of the substrate and the overlying polysilicon lines. Such crystalline defects may lead to line lift-off and device failure during subsequent processing steps. Another disadvantage is variations in the linewidth of the polysilicon lines. The hot acid baths will attack the sidewalls of the polysilicon gates or lines to some degree. If the amount of attack is known and repeatable, then the design rules may account for the loss. However, consistency in sidewall attack has proved difficult to attain. The difficulty stems from the fact that the acid solutions can be quickly depleted of reactants. Thus, successive lots of substrates may be subjected to acid baths with different compositions.
Another conventional process utilizes dry plasma etching to remove the anti-reflective coating layer. This type of process may avoid the thermal shocks associated with hot dips. However, the plasma can attack and create recesses in the silicon adjacent to the gate stack. This occurs because the conventional dry etch anti-reflective coating removal process is performed after gate etch but before other films, such as refractory metals, are applied over the exposed portions of the substrate. The recesses may impact device performance, particularly if they form in very close proximity to the gate stack.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention, a method of manufacturing is provided that includes forming an anti-reflective coating on a structure on a substrate. A first spacer and a second spacer are formed adjacent to the structure. The first spacer covers a first portion of the substrate and the second spacer covers a second portion of the substrate. The anti-reflective coating is removed while the first and second spacers are left in place to protect the first and second portions of the substrate.
In accordance with another aspect of the present invention, a method of manufacturing is provided that includes forming an anti-reflective coating containing silicon and nitrogen on a conductor layer on a substrate. The conductor layer is etched to form a gate. An insulating layer is formed on the anti-reflective coating, the gate and the substrate. A first spacer and a second spacer are formed on the insulating layer adjacent to the gate. The first spacer is positioned over a first portion of the substrate and the second spacer is positioned over a second portion of the substrate. The anti-reflective coating is removed while the first and second spacers are left in place to protect the first and second portions of the substrate.
accordance with another aspect of the present invention, a method of manufacturing is provided that includes forming an anti-reflective coating containing silicon and nitrogen on a conductor layer on a substrate. The conductor layer is etched to form a gate. An oxide layer is formed on the anti-reflective coating, the gate and the substrate. A first silicon nitride spacer and a second silicon nitride spacer are formed on the insulating layer adjacent to the gate. The first spacer is positioned over a first portion of the substrate and the second spacer is positioned over a second portion of the substrate. The anti-reflective coating is removed while the first and second spacers are left in place to protect the first and second portions of the substrate by etching the anti-reflective coating selectively to the substrate and the oxide layer.
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Advanced Micro Devices , Inc.
Honeycutt Timothy M.
Lindsay Jr. Walter L.
Niebling John F.
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