Semiconductor memory cell and semiconductor memory device

Details Semiconductor memory cell and semiconductor memory device Semiconductor memory cell and semiconductor memory device

2003-03-24

2004-09-07

Wilczewski, Mary (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S296000, C257S300000, C438S003000

Reexamination Certificate

active

06787832

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The invention lies in the semiconductor technology field. More specifically, the invention relates to a semiconductor memory cell and to a semiconductor memory device formed therefrom.
In semiconductor memory devices, a multiplicity of semiconductor memory cells are combined in a memory area. An objective of the further development of modern semiconductor memory technologies is, inter alia, to improve the operational reliability and to increase the integration density of the memory cells in the memory devices.
An alternative way of realizing very favorable semiconductor memory cells and semiconductor memory devices that can be processed in a simple manner consists in departing from silicon technology, which is complicated and capital-intensive, and employing very much simpler fabrication methods, for example by printing on the structures. The economic compulsion toward extreme miniaturization of the components is obviated in this case. Attention is in this case paid in particular to improving nonvolatile memory mechanisms and to the integration thereof.
It is problematic in the case of prior art nonvolatile memory mechanisms that the access to each individual memory cell is effected via corresponding electrical signals; these can also have the effect that the memory contents are in the process changed inadvertently by the corresponding electrical access signals.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a semiconductor memory cell and a semiconductor memory device, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which provides for a semiconductor memory cell in which information can be stored in nonvolatile form, and in which the memory cell can be accessed without any change to the information or loss of information.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor memory cell, comprising:
a field-effect transistor device forming an access device, the field-effect transistor device having first and second source/drain regions, a channel region, comprising or consisting of an organic semiconductor material, between the first and second source/drain regions, and a gate electrode configuration; and
a storage capacitor having a ferroelectric storage dielectric and at least one electrode forming a first gate electrode of the gate electrode configuration of the field-effect transistor device.
In other words, the objects of the invention are achieved with a semiconductor memory cell that has a field-effect transistor device as access device, which has a channel region with or made of an organic semiconductor material between a first and a second source/drain region. Furthermore, a storage capacitor is provided, which has a ferroelectric storage dielectric and at least one electrode, which functions as a first gate electrode of a gate electrode configuration of the field-effect transistor device.
A first central concept of the present invention is the provision of an organic semiconductor material in the channel region of the field-effect transistor device. Organic semiconductor materials are particularly suitable for particular applications in which large scale integration is not required and for which a mechanically flexible substrate is of value, for example in ID tags, smart cards, or the like. The outstanding properties are essentially based on the possibility of a mechanically flexible substrate material and also on the relatively low costs of such materials and the low costs of the methods used for processing these materials.
In accordance with a preferred embodiment of the invention, furthermore, a selection gate electrode of the gate electrode configuration is provided, by means of which the field-effect transistor device can be switched off and/or, if appropriate, switched on in a defined and controllable manner, to be precise substantially without influencing the storage dielectric and/or substantially independently of the first gate electrode.
A further central idea of the present invention thus consists in forming a selection gate electrode in a form which is independent of the first gate electrode, by means of which the field-effect transistor device can be switched off and/or, if appropriate, switched on in a defined and controllable manner, without influencing the storage dielectric. What is thereby achieved is that an access to the field-effect transistor device can be interrupted in a defined manner, so that a signal current that has been detected, if appropriate, in the case of an arrangement of a plurality of memory cells according to the invention, can originate exclusively from selected semiconductor memory cells, because the respective nonselected memory cells make no contribution to the measurement current and thus to the signal current. Upon the application of a corresponding electrical potential difference and with respect to the channel zone or channel region, the selection gate electrode for switching off the field-effect transistor device in a defined manner exerts essentially no electromagnetic influence on the storage dielectric, so that the electromagnetic material properties of the storage dielectric, for example the state of polarization, are not influenced thereby. The information state corresponding to the electromagnetic material state of the storage dielectric thus remains untouched and is preserved, so that the information is not lost or changed even in the event of random access as a result of the switching-on or switching-off of the field-effect transistor device.
In accordance with a further embodiment of the semiconductor memory cell according to the invention, it is provided that, in this case, different information states can be represented and/or detected as different electric currents flowing for a given electrical potential difference between the source/drain regions via the respective channel region.
In this case, it is furthermore provided that the current via the channel region can be influenced by means of states of polarization of the ferroelectric storage dielectric which correspond to different information states. Consequently, by means of the interlinking of the state of polarization corresponding to the information—of the ferroelectric storage dielectric with the electromagnetic influencing by the state of polarization on the channel region, the detection or signal current that is to be measured, if appropriate, is influenced, as a result of which the information stored as a state of polarization in the storage capacitor actually becomes able to be read out toward the outside.
In accordance with another embodiment of the semiconductor memory cell according to the invention, it is provided that the gate electrode configuration is electrically insulated from the source/drain regions and the channel region by at least one insulation region. This is one of the basic preconditions for the functioning of the semiconductor memory cell formed in an integrated manner with a field-effect transistor device and a storage capacitor.
In a particularly preferred embodiment of the semiconductor memory cell according to the invention, the ferroelectric storage dielectric or a part thereof is provided as or in a region between the channel region and the first gate electrode of the gate electrode configuration. This can be done in particular by the ferroelectric storage dielectric or a part thereof being formed either altogether as the insulation region or as part thereof.
In another embodiment, the ferroelectric storage dielectric is formed in direct proximity or in contact with the channel region, at least one or both source/drain regions, the first gate electrode and/or the selection gate electrode. This results in a particularly compact and space-saving design of the semiconductor memory cell according to the invention, and the contact between the individual materials is noncritical as long as the respective insulation

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