Input buffer

Details Input buffer Input buffer

1996-12-31

1999-08-17

Tokar, Michael

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

326119, 326112, H03K 19094, H03K 1920

Patent

active

059399007

ABSTRACT:
An input buffer which is coupled to a direct voltage source and ground, includes at least one CMOS device and an enhancement mode NMOS transistor, receives at least one input signal and provides one output signal. The input buffer makes use of the enhancement mode NMOS transistor to lower the potential difference between the gate terminal and the source terminal of the PMOS transistor of the CMOS device. Thus, the input buffer can lower the turning on degree of the PMOS transistor effectively. Then the PMOS transistor which is considered as a pull-up transistor can lower the degree to which the input buffer is turned on, and maintain the characteristics and functionality of the input buffer.

REFERENCES:
patent: 4859870 (1989-08-01), Wong et al.
patent: 5332934 (1994-07-01), Hashimoto et al.
patent: 5343099 (1994-08-01), Shichinohe
patent: 5594369 (1997-01-01), Kondoh et al.
Horenstein, Microelectronic Circuits & Devices, Prentice-Hall, Inc, pp. 753-755, 1990.

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