Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation
Reexamination Certificate
2001-06-06
2003-11-11
Lee, Eddie (Department: 2815)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Recessed oxide by localized oxidation
C438S439000, C438S762000, C438S770000, C438S773000
Reexamination Certificate
active
06645827
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, such as a semiconductor integrated circuit, and more particularly to a method for forming isolation regions to delimit active regions on a semiconductor substrate.
2. Prior Art
To mutually electrically isolate the active regions, in which semiconductor devices such as transistors are formed, on a silicon semiconductor substrate, for example, isolation regions made of silicon oxide are generally formed, and semiconductor devices are formed as required in the active regions delimited by the isolation regions.
The LOCOS isolation process is one of the above-mentioned methods for forming isolation regions. According to this process, under the condition that the surface of a silicon semiconductor substrate is partially covered with a patterned oxidation inhibiting film, such as silicon nitride, and partially exposed through the openings of the oxidation inhibiting film, the regions of the surface of the semiconductor substrate exposed from the oxidation inhibiting film can be oxidized by heat treatment and the isolation regions are formed by the field oxide films of silicon oxide produced by the above-mentioned oxidation process
Meanwhile, with the progress of the scaledown of the isolation regions accompanying the miniaturization of the electronic devices, the regions exposed from the oxidation inhibiting film decrease, for which reason the field oxide film sometimes could not be grown sufficiently in the exposed regions.
This is considered because the floating particles of the oxidation inhibiting film, removed in the plasma etching process of patterning the oxidation inhibiting film, are liable to accumulate on the exposed areas of the substrate.
In the so-called FLOCOS (Flamed LOCOS) process, side-walls are formed at the edge portions of the openings patterned in the oxidation inhibiting film, a fact which enables finer patterns to be formed in the oxidation inhibiting film than are specified in the design rule for patterning of the oxidation inhibiting films. Therefore, it is possible to obtain smaller isolation regions than are specified in the pattern design rule but; on the other hand, particles of the unnecessary side-wall material removed by plasma etching during the formation of the side-wall parts tend to be re-deposited on the exposed surface, making it difficult for a field oxide film to be grown sufficiently.
The present invention has as its object to provide a method for forming isolation regions at higher yield than in the prior art.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention, a first method for forming an isolation region made of a field oxide film generated by performing a thermal oxidation process on an exposed region of the surface of a semiconductor substrate revealed through an opening of an oxidation inhibiting film under the condition that the above-mentioned surface is partially covered by the oxidation inhibiting film. The above-mentioned thermal oxidation process comprises a first heat treatment in a gaseous atmosphere containing oxygen and hydrogen, and a second heat treatment subsequent to the first heat treatment in a gaseous atmosphere with the supply of hydrogen stopped.
In the first heat treatment, heat treatment is carried out in a gaseous atmosphere containing oxygen and hydrogen. Therefore, the moisture produced by interaction between oxygen and hydrogen further reacts with the oxide film inhibiting substance accumulated on the exposed surface of the substrate, thereby decomposing the oxide film inhibiting substance, which is re-deposited. To prevent the progression of irregularities that occur due to the decomposition of the oxide film inhibiting substance, the first heat treatment is switched to the second heat treatment that is performed in an oxygen atmosphere, which has conventionally been used.
By performing a combination of the first heat treatment attended by moisture production and the second heat treatment at a higher temperature with no production of moisture, a field oxide film can be grown securely and irregularities, such as the white ribbon phenomenon, can be inhibited from developing. Thus, it becomes possible to form an isolation region by a suitably minuscule field oxide film.
Hydrogen can be added as a supplementary substance to the oxygen, and after the side-wall parts have been formed at the edge portions of the oxidation inhibiting film, thermal oxidation can be applied to the FLOCOS (Flamed LOCOS) mentioned above.
With regard to forming the side-wall parts, as in the conventional Flamed LOCOS, after the oxidation inhibiting film partially covering the surface of the semiconductor substrate, the side-wall parts can be formed by depositing a side-wall material on the oxidation inhibiting film and on the region of the above-mentioned surface which is exposed through an opening of the oxidation inhibiting film, and by removing the unwanted side-wall material that builds up on the oxidation inhibiting film and on the exposed region of the semiconductor substrate by plasma etching, leaving behind the side-wall parts at the edge portions of the oxidation inhibiting film.
Preferably, the first and second heat treatments are carried out in a single heating furnace to prevent the process from becoming complicated and also to prevent exposure to the atmospheric air to thereby securely preclude insulation deterioration, which may be caused by entry of foreign substances into the field oxide film.
According to a second aspect of the present invention, a second method for forming an insulation region made of a field oxide film, comprises partially covering the surface of a semiconductor substrate with an oxidation inhibiting film; depositing a side-wall material on said oxidation inhibiting film and on an exposed region of said surface, revealed through an opening of said oxidation inhibiting film, to form side-wall parts at edge portions of said oxidation inhibiting film by a material having the same function as said oxidation inhibiting film; forming a protective film on that region of the deposited material corresponding to said oxidation inhibiting film; removing, by a plasma etching process, unnecessary portions of said side-wall material exposed from said protective film, to form said side-wall parts by said deposited; and heat-treating said surface partially exposed between said side-wall parts to grow a field oxide film.
According to the second method, when removing, by plasma etching, unwanted portions of the side-wall material deposited on the oxidation inhibiting film and on the exposed region of the surface not covered by the overlying oxidation inhibiting film, because the protective film on the deposited side-wall parts protects the side-wall material under the protective film from attack by the plasma etching process, a large amount of side-wall material is prevented from scattering in the atmospheric gas in the plasma etching process as in the prior art, and the suppression of the growth of the field oxide film caused by the re-deposition of the scattering material can be prevented, which used to occur in conventional heat treatment in the prior art.
The oxidation inhibiting film and the protective film are preferably formed by a photolithographic technique using the same mask for simplicity and accuracy of the process.
REFERENCES:
patent: 5151381 (1992-09-01), Liu et al.
patent: 5637528 (1997-06-01), Higashitani et al.
patent: 5985738 (1999-11-01), Jang et al.
patent: 6221789 (2001-04-01), Arghavani et al.
patent: 10-209268 (1998-08-01), None
patent: 10-335445 (1998-12-01), None
Lee Eddie
Oki Electric Industry Co. Ltd.
Richards N. Drew
Volentine & Francos, PLLC
LandOfFree
Method for forming isolation regions on semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for forming isolation regions on semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for forming isolation regions on semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3177686