Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing
Reexamination Certificate
1999-08-06
2003-02-04
Gaffin, Jeffrey (Department: 2782)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output process timing
C710S021000, C710S038000, C710S052000, C710S053000, C710S033000
Reexamination Certificate
active
06516363
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to data paths, and more particularly to output data paths capable of single or double data rates.
BACKGROUND OF THE INVENTION
The speed of transferring data in a computer system is often a major component in overall system performance. The faster data can be transferred from one component to another, the faster the system is. This data transfer rate can create a severe bottleneck for system performance.
Memory devices and circuits are components in systems that desire a fast data transfer rate. Memory devices have a data path for transferring data. Memory circuits are vital components in computer and other systems which require permanent or temporary data storage. The memory circuits such as dynamic random access memory (DRAM) are used in systems such as a microprocessor system. The speeds and volume of data used in these systems has increased, causing an increased need for memory circuits. The amount of data that can be written or read over a set period of time is critical. Memory is often a critical component of various computer related systems. By increasing the speeds at which data can be accessed, the speeds of those systems can be increased.
In a processor based system, a processor operates at a certain frequency. Ideally, memory devices would operate at the same frequency as the processor. However, memory devices do not operate at the same speed as the processor due to the high cost involved. Memory devices generally operate at a fraction of the speed of the processor and cause the system to run slower.
In processing systems, operation speeds of dynamic random access memories used as main memories have been increased, but are still low compared with operation speeds of microprocessors. This relatively low speed increases the wait time of the microprocessor, and impedes fast processing, as an access time and a cycle time of the DRAM form a bottleneck in a whole system performance.
One way that memory circuits can be made to write and read data faster is to build the memory circuits so they operate at a higher clock frequency and transfer data at a faster rate. This has been done in microprocessors as can be seen by the increase in operating frequency in microprocessors. For example, a microprocessor running at 200 Mhz is generally much faster than a microprocessor running at 50 Mhz. However, by operating circuits at higher operating frequency, additional problems are encountered. For example, the amount of heat produced and power used by a circuit operating at a higher frequency can be greatly increased. This corresponds to high cost solutions to handle the heat and power problems. Furthermore, the increased use of portable devices, such as laptop computers, requires that power use by circuits be reduced. Also, the higher operating frequency can cause integrated circuit die to be more expensive.
Since memory devices are used in many different systems, increasing the speed of memory devices without significantly increasing the cost of memory devices can allow everything from word processors to automatic teller machines to perform their tasks quicker.
Other system components also use data paths to transfer data. If these data paths can transfer data faster, the overall performance of the system can increase. Data paths can be used to transfer data from a data array or a hard drive.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for double data rate data paths and methods of transferring data at double data rates.
SUMMARY OF THE INVENTION
One embodiment of the present invention provides a system having a data unit, an output register, and a holding register. The output register is coupled to the data unit. The holding register is coupled to the data unit and the output register. The system can transfer data at a single rate or double rate.
Another embodiment of the invention provides a method for transferring data. A first piece of data is passed to an output register. A second piece of data is passed to a holding register. The second piece of data is passed from the holding register to the output register.
Other embodiments are described and claimed.
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“Increasing Data Read Rate from Memories”,IBM Technical Disclosure Bulletin, 30, 339-341, (May, 1988).
Porter John D.
Thompson William N.
Weber Larren Gene
Gaffin Jeffrey
Micro)n Technology, Inc.
Perveen Rehana
Schwegman Lundberg Woessner & Kluth P.A.
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