Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2002-04-22
2003-02-25
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S023000, C327S546000
Reexamination Certificate
active
06525559
ABSTRACT:
BACKGROUND OF INVENTION
This invention relates to differential receivers, and more particularly to fail-safe circuits for low-voltage differential signaling (LVDS) receivers.
Networking equipment often transmits signals over cables. Although the cables may be only a few meters in length, a transmission-line effect degrades data quality and transmission rate. Large signal swings also increases electro-magnetic interference (EMI) and system noise. To send signals over these cables, special drivers and receivers have been developed using reduced voltage swings and differential signaling, such as low-voltage differential signaling (LVDS) drivers and receivers.
In actual systems, cables can become disconnected, such as by a network technician when networks are updated, or when a cable fails. The transmitter can also fail or be in a high-impedance output state. At these times, neither one of the two differential output lines is driven. The voltage across a terminating resistor drops to near zero. Noise can be coupled into the cable from various sources, and this noise can be picked up by the receiver's differential inputs and amplified. False triggering of receiver logic can occur.
To prevent such problems, fail-safe circuits have been employed. A simply fail-safe circuit uses resistors to connect the differential lines to power and ground.
FIG. 1
shows a prior-art differential receiver and fail-safe circuit using an error-detection logic gate. Differential amplifier
10
receives a differential pair of input voltages V+, V−, and amplifies the voltage difference between V+ and V− to generate its output to NOR gate
20
, which generates output VO. Output VO typically is a digital signal driven fully to power and ground.
Sometimes differential inputs V+, V− are not driven by the transmitter, such as when a cable to the transmitter is disconnected, shorted together, or broken, or the transmitter is in a high-impedance state or is non-operational. When not being driven, signals V+, V− can float to indeterminate voltages, and noise can be coupled in. To prevent output VO from being in an indeterminate state, resistors
12
,
14
are added.
When an open or a short occur on lines V+, V−, pull-up resistor
12
pulls signal V+ high, while pull-up resistor
14
pulls signal V− high. Since both lines V+, V− are pulled high by resistors
12
,
14
, no current flows through terminating resistor
22
.
AND gate
16
is coupled to the inverting and non-inverting inputs of differential amplifier
10
. When an open or short occurs on the cable and resistors
12
,
14
pull both V+ and V− high, AND gate
16
detects the high-high condition on its inputs and outputs a high to OR gate
20
. OR gate
20
drives its VO output high, since one of its inputs is high. The state of the input from differential amplifier
10
does not matter. Thus any indeterminate state of the output from differential amplifier
10
is masked by OR gate
20
.
One problem with such a prior-art fail-safe circuit is that relatively large-area resistors
12
,
14
are needed. It is often desired to reduced the number of discrete components in a system by integrating as many components together onto a silicon substrate or chip. For example, while resistors
12
,
14
could be discrete resistors, it is desirable to integrate these resistors onto the same substrate as differential amplifier
10
.
Resistors
12
,
14
could be made from N-well regions patterned in the substrate. However, a large N-well area is needed for these resistors to produce a sufficiently large resistance while safely passing the currents that can occur without damaging the substrate. Also, smaller resistance values are not practical as more leakage currents would be delivered through the resistors during normal operation. Leakage currents on the same order as the differential driver's current could interfere with differential sensing by the receiver.
Large-area N-well resistors are undesirable since they have large parasitic capacitances that can slow differential signals. The higher input capacitance to differential amplifier
10
can limit high-frequency operation, especially when chip package and wire inductances and resistances are accounted for. Other resistor materials such as polysilicon may have lower resistivity requiring even larger areas. Other materials may be less reliable and more susceptible to failures due to over-heating or other mechanisms. Polysilicon resistors may have a low resistivity and require a much larger area.
Furthermore many telecom applications are often required to operate the receivers in a “hot-swap” mode. In such cases the receivers could be powered down while their inputs are still being driven. Consequently system data may be corrupted and the receivers damaged.
What is desired is a fail-safe circuit for a differential receiver. A fail-safe circuit with lower-capacitance input resistors is desirable. It is also desirable that the receiver with such a fail-safe circuit can be powered down safely without interruption.
REFERENCES:
patent: 5065047 (1991-11-01), Igari et al.
patent: 5362991 (1994-11-01), Samela
patent: 5532558 (1996-07-01), George
patent: 5635852 (1997-06-01), Wallace
patent: 6061806 (2000-05-01), Caldwell et al.
patent: 6184730 (2001-02-01), Kwong et al.
patent: 6188271 (2001-02-01), Wang et al.
patent: 6201405 (2001-03-01), Hedberg
patent: 6288577 (2001-09-01), Wong
patent: 6320406 (2001-11-01), Morgan et al.
Kwong David
Wu Ke
Auvinen Stuart T.
Cho James H
Pericom Semiconductor Corp.
Tokar Michael
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