Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-10-26
2003-02-18
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S291000, C257S293000, C250S208100, C348S300000
Reexamination Certificate
active
06521926
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a solid state image sensor employing an array of pixels, each pixel comprising a photodiode and a plurality of insulated gate transistors such as MOSFETs.
2. Description of the Related Art
There are various solid state image sensors that employ semiconductor devices such as solid state charge-coupled devices (CCDs). The CCD image converters have an interline transfer (IT-CCD), a frame transfer (FT-CCD), charge primitive device (CPD), a photoconductive layer on solid scanner (PLOSS) and other structures. Among them, the interline transfer CCD architecture arranges transfer CCDs between photodiodes.
FIG. 1
shows an example of the interline transfer CCD image sensor according to a prior art. In
FIG. 1
, photodiodes
103
simultaneously transfer accumulated charge to vertical CCDs (V-CCD)
101
-
1
to
101
-n, which transfer the charge of each line of the photodiodes
103
to a horizontal CCD (H-CCD)
104
. The horizontal CCD
104
serially transmits data based on the transferred charge to the outside through an amplifier
105
.
This prior art needs a high voltage of about 10 V to read signal charge from the photodiodes
103
, as well as power supplies of zero and minus volts to transfer the signal charge. Then the prior art consumes large power and further has a problem that the CCDs are hardly installed on a chip.
To solve the problem, image sensors employing MOSFETs are attracting attention. The MOS type image sensor arranges address lines in a matrix form to select pixels each consisting of a photodiode, MOSFET switching elements, etc.
FIG. 2
shows the structure of a pixel of an image sensor employing the MOSFETs. A photodiode D
30
converts light into a photodiode current, which passes through a load transistor Q
31
. This current is about 10
−15
A to 10
−9
A. Accordingly, the load MOSFET Q
31
operates in a weak inversion region, i.e., a sub-threshold mode (Vc<<Vth), and conversion from a photoelectric current into a voltage is dependent on a logarithmic value of a current value. A source voltage of the load MOSFET Q
31
is buffered by a source-follower MOSFET Q
32
. A pixel selection MOSFET Q
33
is connected to an activation line
215
and a data read line
216
.
When the MOS type image sensor employs miniaturized feature sizes, each MOSFET involves a short gate length to make a short-channel effect conspicuous. This increases a leakage current between the source region and drain region of the load MOSFET Q
31
, to deteriorate the sensitivity of the pixel.
To suppress a “punch through” phenomenon between the source and drain regions of a MOS transistor in a weak inversion region, Japanese Unexamined Patent Publication No. 9-298286 discloses a technique of extending the gate length of the load MOSFET Q
31
. This technique, however, contradicts fine element technology and has some limitations.
Namely, this technique maintains the impurity concentration of well regions and extends the gate length of the load MOSFET Q
31
by 1.1 times or larger. If finer design rules are employed, the technique must increase the impurity concentration of well regions.
To suppress the punch through phenomenon between the source and drain regions of a MOS transistor in a weak inversion region, the impurity concentration of well regions must be increased. The photodiode D
30
for converting light into carriers, however, is formed in the same p-well region where the load MOSFET Q
31
is formed.
Namely, an anode region of the photodiode D
30
is in the p-well region, and a cathode region thereof is in an n-diffusion layer that is formed in the p-well region. This n-diffusion layer serves as the source/drain region of the load MOSFET Q
31
. If the impurity concentration of the p-well region is increased, the impurity concentration of the n-diffusion layer must also be increased to maintain a specific I-V characteristics of MOSFET realizing a predetermined saturation signal quantity. This makes a junction electric field steeper to increase so called “white pixels” due to junction leakage currents. In addition, this makes a junction shallower to deteriorate spectral sensitivity in a long wavelength spectrum and increase a signal read voltage.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a MOS type image sensor capable of preventing “white pixels” due to junction leakage currents.
Another object of the present invention is to provide a MOS type image sensor capable of securing spectral sensitivity in a long wavelength spectrum without increasing a signal read voltage.
Still another object of the present invention is to provide a MOS type image sensor capable of reading charge with a low voltage.
Still another object of the present invention is to provide a MOS type image sensor capable of employing scaled MOSFETs while suppressing the short-channel effect.
In order to accomplish the objects, a first aspect of the present invention provides a new structure of a scaled pixel applicable to a MOS type image sensor that consists of an image area and a peripheral circuitry area having a peripheral circuit disposed in a first well region of a first conductivity type for driving the image area. The image area consists of pixels that are arranged linearly or in a matrix. According to the first aspect, each of the pixels consists of at least a second well region of the first conductivity type, having a lower impurity concentration than the first well region; a photodiode having a first main electrode region made of the second well region and a second main electrode region formed as a first diffusion layer of a second conductivity type opposite to the first conductivity type, disposed at a part of the surface of and in the second well region; a read transistor having a first main electrode region made of the first diffusion layer, a second main electrode region formed as a second diffusion layer of the second conductivity type disposed at a part of the surface of and in the second well region, a gate insulation film disposed on the surface of the second well region between the first and second diffusion layers, and a gate electrode disposed on the gate insulation film and connected to a read signal line; and an amplification transistor disposed in a third well region of the first conductivity type, having a gate electrode connected to the second main electrode region of the read transistor, a first main electrode region connected to an output signal line, and a second main electrode region. Here, the “first main electrode region” is one of the anode and cathode regions of a photodiode, or one of the source and drain regions of an insulated gate transistor (IGT) such as a MOSFET and a MOS static induction transistor (SIT). The “second main electrode region” is the other of the anode and cathode regions, or the other of the source and drain regions. For example, if the first main electrode region is the anode region, the second main electrode region is the cathode region, and if the first main electrode region is the source region, the second main electrode region is the drain region. Generally, IGTs are symmetrical, and therefore, the source and drain regions thereof are replaceable with each other. For the IGTs, the source and drain regions are only the matter of naming. The peripheral circuitry area may include another peripheral circuit disposed in another well region of the second conductivity type so as to form the CMOS circuitry for driving the pixels disposed in the image-area. Further the peripheral circuitry area may include bipolar transistors (BJTs) so as to form the BiCMOS circuitry for driving the pixels disposed in the image area.
According to the first aspect, the first main electrode region of the photodiode is a semiconductor region of lower impurity concentration. Accordingly, the second main electrode region of the photodiode disposed inside the first main electrode region can be a semiconductor region of lower impurity concentration. Since the photodiode is
Foley & Lardner
Kabushiki Kaisha Toshiba
Kang Donghee
Loke Steven
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