Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2000-10-18
2003-10-14
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S103000, C711S154000, C365S185330
Reexamination Certificate
active
06633956
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a technique for suppressing operating current for a storage unit which comprises at least one storage element.
2. Description of the Background Art
Currently, a variety of memory cards are used as alternatives to storage media for various pieces of equipment, for example an HDD (hard disc drives), or add-on memory.
Specifications required of these memory cards vary according to their intended purposes. For example when used in desktop personal computers, industrial equipment, or the like, those memory cards require processing capability, typified by write/read speed, rather than low current consumption. Some equipment such as portable personal computers and digital cameras, on the other hand, attach importance to a reduction in power consumption based on the premise that a certain level of processing capability is achieved.
It is however inconvenient to prepare a wide variety of memory cards according to specifications required. Further when different models employ the same memory card as a medium, such a card should preferably be used to specifications suitable for each model. One example is that in order to store image data, a memory card is installed into equipment such as a digital camera that sets importance on lower power consumption, and then in order to read the image data, the memory card is installed into equipment such as a desktop personal computer that sets importance on performance capability.
Japanese Patent Application Laid-open No. 2-12475 (1990) for example discloses EEPROM with a built-in frequency divider that divides a clock signal given from the outside in frequency for the purpose of achieving stable or variable write time.
SUMMARY OF THE INVENTION
A first aspect of the present invention is directed to a memory card comprising: at least one storage element; an original clock generator generating an original clock; and a frequency divider dividing the original clock in frequency in a variable divisional ratio to produce a clock signal that defines an operating frequency of the storage element.
According to a second aspect of the present invention, in the memory card of the first aspect, the setting of the divisional ratio corresponds to the setting of power consumption for the memory card.
According to a third aspect of the present invention, the memory card of the first or second aspect further comprises: a frequency dividing register for setting the divisional ratio.
Preferably in the memory card, the frequency dividing register should be located in a RAM attached to a CPU which controls an operation of the storage element.
A fourth aspect of the present invention is directed to a memory card comprising: a plurality of storage elements; and a plurality of task registers for storing physical addresses used in writing to the plurality of storage elements.
Preferably in the memory card, the plurality of task registers should be located in a RAM attached to a CPU which controls operations of the storage elements.
According to a fifth aspect of the present invention, in the memory card of the fourth aspect, one of the plurality of task registers alternately stores the physical addresses for at least two of the plurality of storage elements.
Preferably, the memory card should further comprises: a task register number setting register for storing a number of the plurality of task registers to be used to alternately store the physical addresses for at least two of the plurality of storage elements, the task register number setting register being located in a RAM attached to a CPU which controls operations of the storage elements.
According to a sixth aspect of the present invention, the memory card of the fourth or fifth aspect further comprises: data registers provided in correspondence with the task registers, for storing write data written at the physical addresses.
Preferably in the memory card, the data registers should be located in a buffer for the plurality of storage elements.
A seventh aspect of the present invention is directed to a method of controlling a memory card which comprises at least one storage element, an original clock generator generating an original clock, and a frequency divider producing a clock signal that defines an operating frequency of the memory element on the basis of the original clock. The method provides a variable control over a divisional ratio of the frequency divider.
According to an eighth aspect of the present invention, in the method of the seventh aspect, the setting of the divisional ratio corresponds to the setting of power consumption for the memory card.
A ninth aspect of the present invention is directed to a method of controlling a memory card which comprises a plurality of storage elements and a plurality of task registers storing physical addresses used in writing to the plurality of storage elements. The method comprises the steps of: (a) storing a physical address used in writing to a first one of the storage elements into a first one of the task registers; (b) performing writing to a second one of the storage elements; (c) checking the status of the first one of the storage elements after the steps (a) and (b); and (d) when the result of the step (c) is an error, performing rewriting using the physical address stored in the first one of the task registers.
According to a tenth aspect of the present invention, in the method of the ninth aspect, one of the plurality of task registers alternately stores the physical addresses for at least two of the plurality of storage elements.
In accordance with the memory card of the first aspect and its method of control of the seventh aspect, a variable divisional ratio makes variable the operating frequency of the memory element. This achieves variable processing capability and operating power of the memory card.
In accordance with the memory card of the second aspect and its method of control of the eighth aspect, if power consumption is set, the memory element operates at the corresponding operating frequency. This reduces power consumption.
In accordance with the memory card of the third aspect, the divisional ratio can be set in the interior of the memory card.
In accordance with the memory card of the fourth aspect and its method of control of the ninth aspect, since a task register holds the physical addresses used in writing to the first one of the memory elements, rewrite processing can be performed even if the write instruction for the first one of the memory elements is not executed properly. Therefore, a write instruction for the second one of the memory elements can be executed after the execution of the write instruction for the first one of the memory elements without making a check for the completion of the write instruction for the first one of the memory elements. This allows for ease in parallel write processing.
In accordance with the memory card of the fifth aspect and its method of control of the tenth aspect, the highest number of memory elements used for parallel write processing is limited to the number of to-be used task registers. Thus, power consumption can be reduced by limiting the number of task registers.
In accordance with the memory card of the sixth aspect, rewriting can be performed since the data registers hold already-written data.
An object of the present invention is to provide a technique for adjusting the specifications of memory cards in various manners to their applications for variable processing capability and operating power.
REFERENCES:
patent: 4829425 (1989-05-01), Bain et al.
patent: 5047924 (1991-09-01), Fujioka et al.
patent: 5491826 (1996-02-01), Koino
patent: 5768617 (1998-06-01), Liu
patent: 6041396 (2000-03-01), Widigen
patent: 6185134 (2001-02-01), Tanaka
patent: 6263412 (2001-07-01), Townsend
patent: 6345367 (2002-02-01), Sinclair
patent: 6442656 (2002-08-01), Alasti et al.
patent: 2-12475 (1990-01-01), None
patent: 5-120890 (1993-05-01), None
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