Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2002-05-10
2003-06-24
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S692000, C438S719000
Reexamination Certificate
active
06583036
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device provided with a fine gate electrode.
2. Background Art
In recent years, in order to attain a high degree of integration of a semiconductor device, there is an increasing demand of forming a fine gate electrode of a transistor serving as a semiconductor element.
In
FIGS. 3A
to
3
E, a conventional method of manufacturing a semiconductor device is briefly described.
FIGS. 3A
to
3
E are schematic sectional views showing a semiconductor device in the respective steps of forming a gate electrode.
Initially, as shown in
FIG. 3A
, a gate insulating film
2
is formed on a silicon substrate
1
.
Next, as shown in
FIG. 3B
, a polysilicon film
3
is formed on the gate insulating film
2
. It will be noted here that part of the thus formed polysilicon film
3
becomes a gate electrode in a subsequent step.
Thereafter, as shown in
FIG. 3C
, a photoresist
4
is applied onto the polysilicon film
3
.
As shown in
FIG. 3D
, a desired resist pattern
4
a
is formed on the polysilicon film
3
according to photolithography.
Next, as shown in
FIG. 3E
, an exposed portion of the polysilicon film
3
, which is not covered with the resist pattern
4
a
, is etched via a mask of the resist pattern
4
a
. Moreover, the resist pattern
4
a
is removed to form a polysilicon film
3
a
serving as a gate electrode on the gate insulating film
2
.
In the above-stated conventional method of manufacturing a semiconductor device, the scale down of the gate electrode relies on the resolution in a lithographic technique. More particularly, the gate length of the gate electrode becomes substantially same as the line width of the resist pattern formed according to the photolithography. This entails that a possible minimum gate length depends just on the resolution of an exposure equipment used in the photolithography.
The resolution of an exposure equipment is proportional to a wavelength of light from a light source. Hence, for further scale down of the gate electrode, it is essential to use an exposure equipment having a shorter wavelength light source. Nevertheless, certain limitation is placed on the realization of such a shorter wavelength of a light source, so that it has been difficult to form a fine gate electrode at a level below resolution.
To solve the above problem, the following technique is disclosed, for example, in JP-A No. 2001-237420. More particularly, a gate insulating film, a first polysilicon film, a nitride film and a second polysilicon film are successively formed on a semiconductor substrate, followed by forming a pattern of the second polysilicon according to photolithography. Thereafter, the second polysilicon pattern is thermally oxidized on the surface thereof, and the resulting thermal oxidization film is removed to form a finer second polysilicon film.
Thereafter, using the fine second polysilicon pattern as a mask, an exposed portion of the underlying nitride film is removed. The exposed portion of the first silicon film and the fine second polysilicon pattern are both removed via a mask of a remaining nitride film, thereby forming a gate electrode made of the fine first polysilicon film.
The method of manufacturing a semiconductor device as stated hereinabove has the problem that although a fine gate electrode can be formed irrespective of the resolution of photolithography, a number of the manufacturing steps are used and complicated.
SUMMARY OF THE INVENTION
The present invention is provided in order to solve the above-stated problem and contemplates to provide a method of manufacturing a semiconductor device wherein a fine gate electrode can be relatively simply formed without resorting to the resolution in a photolithographic technique.
In one embodiment of the present invention, the method comprises these steps below. A gate insulating film is formed on a substrate, a polysilicon film is formed on the gate insulating film, a resist pattern is formed on the polysilicon film and subsequently an exposed portion of the polysilicon film which is not covered with the resist pattern is removed. Subsequently, the surface of the polysilicon film left after the step of removing the exposed portion of the polysilicon film is thermally oxidized to simultaneously form a gate electrode and an insulating film on the surface of the gate electrode. After the step of simultaneously forming the gate electrode and the insulating film on the surface of the gate electrode, the insulating film on the surface of the gate electrode may be formed with a hole at part thereof.
In another embodiment of the present invention, the method comprises these steps below. A gate insulating film is formed on a substrate, a polysilicon film is formed on the gate insulating film, and a nitride film is formed on the polysilicon film. Next a resist pattern is formed on the nitride film and subsequently an exposed portion of the nitride film which is not covered with the resist pattern is removed, thereby forming a nitride film pattern. Next the exposed portion of the polysilicon film which is not covered with the nitride film pattern is removed. The surface of the polysilicon film left after the step of removing the exposed portion of the polysilicon film is thermally oxidized to simultaneously form a gate electrode and an insulating film on side surfaces of the gate electrode. A silicide is formed on the upper surface of the gate electrode through the insulating film on side surfaces on the gate electrode used as a mask.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
REFERENCES:
patent: 5412246 (1995-05-01), Dobuzinsky et al.
patent: 5962879 (1999-10-01), Ryum et al.
patent: 6060394 (2000-05-01), Wu
patent: 6157063 (2000-12-01), Iiboshi
patent: 6337494 (2002-01-01), Ryum et al.
patent: 2001-237420 (2001-08-01), None
Burns Doane , Swecker, Mathis LLP
Lindsay Jr. Walter L.
Mitsubishi Denki & Kabushiki Kaisha
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