Method of integrating substrate contact on SOI wafers with...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S508000

Reexamination Certificate

active

06521947

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to silicon-on-insulator (SOI) semiconductor devices and a method for forming a structure for contacting a portion of the substrate underlying the silicon on insulator region of the substrate. The present invention also includes semiconductor devices formed according to this process.
BACKGROUND OF THE INVENTION
Semiconductor devices including a silicon on insulator substrate structure include a wafer that has a buried layer of oxide that isolates the top layer of silicon, where the active devices are formed, from the substrate. Hence the term silicon on insulator (SOI). Because the portion of the substrate underlying the oxide layer typically is not electrically connected to any other structure, in other words the underlying substrate is floating, static charges can build up in the substrate during normal chip operation. Such static build ups can cause a back channel of the SOI devices to turn on, which can disturb normal operation of the chips. Impact of build up of static charges can include an increase of standby current of the chips, chip thermal runaway, and even malfunction of the logic and SRAM circuits.
To solve this problem, contact has been made to the portion of the substrate underlying the insulator portion of the silicon-on-insulator substrate structure so as to ground it. At the present time, substrate contact typically is created by wire bonding to the back side of a chip at the packaging level. However, such methods can require extra steps and materials. For example, wire bonding to the back of a chip is expensive because it has to be performed on individual chips one by one. Wire bonding may also require alteration of standard packaging methods.
SUMMARY OF THE INVENTION
The present invention provides a method for forming contacts to a substrate region underlying the insulator portion of a silicon on insulator substrate that may be carried during normal processing operations for forming the chip.
In accordance with these and other objects and advantages, aspects of the present invention provide a method for forming a substrate contact and a substrate that includes a silicon on insulator region. The method includes forming a shallow isolation trench in the silicon on insulator substrate region. The shallow isolation trench is filled. Photoresist is deposited on the substrate. The method also includes forming a contact trench in the substrate through the filled shallow isolation trench and silicon on insulator substrate region extending down at least to the top of a silicon substrate underlying the silicon on insulator region. The contact trench is filled, wherein the material filling the contact trench forms a contact to the silicon substrate.
According to other aspects, the present invention also provides a semiconductor device structure. The device structure includes a substrate including a silicon on insulator substrate region. A shallow trench isolation region is arranged in the substrate. The device also includes a contact trench extends through the shallow trench in the isolation region to a silicon portion of the substrate underlying the silicon on insulator region. The contact trench forms a contact to an underlying silicon portion of the substrate.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.


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