Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2000-08-21
2003-10-28
Vo, Tim (Department: 2181)
Electrical computers and digital data processing systems: input/
Interrupt processing
C710S264000, C710S266000
Reexamination Certificate
active
06640274
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to I/O controllers and device drivers that may program them. More specifically, the invention relates to a method and apparatus for reducing the disk drive data transfer interrupt service latency penalty.
BACKGROUND OF THE INVENTION
Before data may be read from, or written to, a computer's hard drive, a host system must issue a read or write request to the hard drive. In response to such a request, the hard drive in concert with a DMA engine transfers the data to, or from, the host system. The hard drive then issues an interrupt to inform a device driver that the transfer is complete. Because that interrupt is not issued until the end of the data transfer, there is a delay between data transfer completion and device driver notification of that event. That delay, which results from the command overhead inherent in routing the interrupt from the disk drive to the operating system and then to the driver, can be significant—e.g., 10 microseconds for each disk access. Eliminating, or reducing, such an interrupt service latency penalty could significantly enhance a computer's performance.
Accordingly, there is a need for an apparatus and method that reduces the command overhead associated with the transfer of data between a disk drive and a host system. The present invention provides such an apparatus and method.
REFERENCES:
patent: 5727218 (1998-03-01), Hotchkin
patent: 5864712 (1999-01-01), Carmichael et al.
patent: 5896540 (1999-04-01), Asano et al.
patent: 6490651 (2002-12-01), Shats et al.
patent: WO 01/46793 (2001-06-01), None
Grimsrud Knut S.
Huffman Amber D.
Intel Corporation
Seeley Mark V.
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