Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-04-18
2003-12-30
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S612000, C438S614000
Reexamination Certificate
active
06670264
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a process of forming an electrode-to-electrode bond structure. More specifically, the present invention relates to a process of forming an electrode-to-electrode bond structure which can be applied to e.g. bonding as well as electrically connecting a semiconductor chip to another semiconductor chip, mounting a semiconductor chip on a wiring board, and connecting a wiring board to another wiring board.
2. Description of Related Art
There is a growing demand in recent years for increased density in mounting of electronic parts on e.g. a printed wiring board and a ceramic substrate. As away for satisfying such a demand, a bear-chip mounting method is attracting attention. In the bear-chip mounting method, conventional face-up mounting is being taken over by a face-down mounting, i.e. flip chip bonding. In the face-up mounting, electric connection between the semiconductor chip and the wiring board is established usually by means of wire bonding, whereas in the face-down mounting, electrical connection is established by solder bumps between the semiconductor chip and the wiring board. This technique of establishing electrical connection via the solder bumps or solder material is also applied to a connection between two separate semiconductor chips or between two separate wiring boards, as disclosed in JP-A-2-96343, JP-A-4-326747, JP-A-5-326628, JP-A-6-262386, JP-A-8-64639, JP-A-9-260059, JP-A-11-135552, JP-A-11-191673 for example.
FIGS. 6
a
through
6
j
show a conventional method for making a flip chip bonding. According to the conventional flip chip bonding method, first, as shown
FIG. 6
a
, a metal mask
430
is prepared, in which openings
430
a
are formed at positions corresponding to electrodes
411
of a semiconductor
410
.
Next, as shown in
FIG. 6
b
, the metal mask
430
is placed on the semiconductor chip
410
with the openings
430
a
aligned with the corresponding electrodes
411
.
Next, as shown in
FIG. 6
c
, a solder paste
440
containing a predetermined solder powder is filled into the openings
430
a
by means of printing.
Next, as shown in
FIG. 6
d
, the metal mask
430
is removed from the surface of the semiconductor chip
410
, leaving the solder paste
440
.
Next, as shown in
FIG. 6
e
, a heating step follows for melting the solder powder in the solder paste
440
to form bumps
412
on the electrodes
411
.
After the formation of the bumps
412
on the electrodes
411
of the semiconductor chip
410
, a flux
450
is applied on the wiring board
420
, as shown in
FIG. 6
f
. The flux
450
serves to remove an oxide coating from the surface of the bumps
412
while preventing the bumps
412
from re-oxidizing by prohibiting contact with air during the subsequent re-flow soldering step. The flux
450
also performs an additional function of providing preliminary fixation of the semiconductor chip
410
onto the wiring board
420
.
Next, as shown in
FIG. 6
g
, the semiconductor chip
410
is placed on the wiring board
420
with electrodes
421
of the wiring board
320
aligned with the corresponding bumps
412
.
Next, as shown in
FIG. 6
h
, a heating step for re-flowing the bumps
412
follows to connect the electrodes
411
and the electrodes
421
with the bumps
412
.
Next, as shown in
FIG. 6
i
, the flux
450
is washed and removed. In this way, the flip chip bonding of the semiconductor chip
410
to the wiring board
420
is established.
Finally, as shown in
FIG. 6
j
, an adhesive or an under-fill resin
460
is loaded between the semiconductor chip
410
and the wiring board
420
. The under-fill resin
460
protects the bump
412
that serves as a conductor to connect the electrode
411
and the electrode
421
while also protecting the surface of the semiconductor chip
410
and the surface of the wiring board
420
, thereby maintaining the bond reliability for along time.
However, according to the conventional bonding process described above, when the metal mask
430
is placed on the semiconductor chip
410
, the openings
430
a
must be aligned with the electrodes
411
, which becomes increasingly difficult as the electrodes
411
are disposed at a smaller pitch. In particular, when the electrodes
411
are disposed at a pitch of not greater than 200 &mgr;m, the relative magnitude of an alignment error in placing the metal mask
430
becomes very large. Thus, the alignment error in the metal mask
430
results in positional error of the bumps
412
and may cause damage or loss of electric conduction in the flip chip bonding.
When the electrodes
411
are disposed at a pitch not greater than 200 &mgr;m, and if the size of electrodes
412
is half the pitch, the bumps
412
formable on the electrode
411
can have a diameter of about 70 &mgr;m. After bonding via the bumps
412
of such a size, the semiconductor chip
410
and the wiring board
420
is spaced by a distance not greater than 50 &mgr;m. If the distance between the semiconductor chip
410
and the wiring board
420
is so small as such, it is difficult to remove the flux sufficiently in the process step of
FIG. 6
i
. The flux remaining between the semiconductor chip
410
and the wiring board
420
can cause such problems as corrosion of the bumps
412
, decrease of dielectric resistance between the electrodes, and insufficient filling of the under-fill resin
460
. In addition, if the distance between the semiconductor chip
410
and the wiring board
420
is that small, voids can easily develop in the under-fill resin
460
in the process step of
FIG. 6
j
, making it difficult to properly fill the under-fill resin
460
between the semiconductor chip
410
and the wiring board
420
.
Thus, according to the conventional method, it is difficult to obtain a high bond reliability when the electrodes are disposed at a small pitch or at a high density.
Further, according to the above-described conventional method, a large number of steps including application and removal of the flux
450
and filling of the under-fill resin
460
must be performed. In other words, the process is complex.
For the purpose of simplifying the bonding process, a fluxing under-fill resin is used in recent years. The fluxing under-fill resin is an epoxy resin containing a flux as an additive, and is intended to serve as an under-fill resin as well as a flux. For example, the fluxing under-fill resin is applied on the wiring board
420
in the step of
FIG. 6
f
, just as the flux is applied, and then heated, without being washed or removed, to harden between the semiconductor chip
410
and the wiring board
420
in the step of
FIG. 6
j
, just like an ordinary under-fill resin
460
.
The fluxing under-fill resin has to contain an inorganic filler in order to reduce its thermal expansion coefficient, thereby attaining reliability of the bond between the semiconductor chip
410
and the wiring board
420
. However, if the inorganic filler is contained in the fluxing under-fill resin at a proportion of no lower than 20 wt %, such a large amount of the inorganic filler causes the fluxing under-fill resin to easily enter the boundary between each bump
412
and a corresponding electrode
421
, resulting in a very sharp decrease of adhesion of the bump
412
relative to the electrode
421
. For this reason, the addition of the inorganic filler to the extent of reducing the thermal expansion of the fluxing under-fill resin to a necessary level can result in an initial conduction failure caused by the poor bonding rate of the bumps. Another problem is that the fluxing under-fill resin is poor in utility because it is a single-liquid adhesive and has a short service life at room temperature.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a process of forming an electrode-to-electrode bond structure suitable for high-density mounting, capable of achieving a sufficient reliability of the bond and achievable in a small number of steps.
Another object of the present invention is to pro
Imaizumi Nobuhiro
Sakuyama Seiki
Yagi Tomohisa
Fujitsu Limited
Lebentritt Michael S.
Smith Brad
Westerman Hattori Daniels & Adrian LLP
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