Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2000-04-04
2003-06-17
Auve, Glenn A. (Department: 2189)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C711S202000, C711S206000, C711S209000
Reexamination Certificate
active
06581130
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to internal computer communications, and more particularly to bridge devices in multicontroller computer applications.
2. Description of the Related Art
Bridge devices, such as a PCI-to-PCI (peripheral component interconnect) bridge, have traditionally allowed only flow or pass through functionality with respect to communications from one bus interface to another bus interface. Transactions between different bus interfaces, therefore, have been restrictive requiring the different interfaces to have similar if not exact defined address spaces. Alternatively, differences in address spaces have resulted in operation intensive address conflict resolution algorithms. Conflicts are further acerbated in multi-interface applications where one of the multiple interfaces is a memory interface. Specifically multi-conflict resolution has been required between a first and second interface to a memory interface.
One approach has been to configure address spaces to intersect at portions of address space where it can be estimated high traffic between communicating devices will occur. In addition, bridge devices have been configured to translate an incoming address from one known address space to a different but known second address space. However, this translation has been restricted to only predefined translations without runtime flexibility.
SUMMARY OF THE INVENTION
Dynamic address translation among multiple computer bus interfaces is provided through a number of configuration registers. A translation window is established at an initiating or host bus interface using a first set of configuration registers. A base register is programmed to indicate the beginning address of the translation window. Another corresponding register is programmed to set the size of the translation window extending from the beginning address. A transaction occurring on the initiating bus side that falls within the translation window is first claimed by the translation device. If translation is enabled, the translation device distinguishes the portion of the initiating transaction that defines the contents of the information within the translation window and passes that information without translation. The remaining portion of the transaction is translated into a different region at the receiving or local bus interface. The configuration registers may be dynamically remapped during runtime by any communicating master device to translate from a region at one bus interface to a different region at another bus interface.
REFERENCES:
patent: 5386538 (1995-01-01), Nye
patent: 5634013 (1997-05-01), Childers et al.
patent: 5640528 (1997-06-01), Harney et al.
patent: 5649142 (1997-07-01), Lavelle et al.
patent: 5664117 (1997-09-01), Shah et al.
patent: 5682512 (1997-10-01), Tetrick
patent: 5692200 (1997-11-01), Carlson et al.
patent: 5721839 (1998-02-01), Callison et al.
patent: 5734847 (1998-03-01), Garbus et al.
patent: 5771359 (1998-06-01), Galloway et al.
patent: 5838932 (1998-11-01), Alzien
patent: 5894563 (1999-04-01), Saperstein
patent: 5918026 (1999-06-01), Melo et al.
patent: 5953511 (1999-09-01), Sescila et al.
patent: 6098113 (2000-08-01), Heil et al.
patent: 6105146 (2000-08-01), Tavallaei et al.
patent: 6154824 (2000-11-01), Robertson et al.
patent: 6324609 (2001-11-01), Davis et al.
patent: 6353877 (2002-03-01), Duncan et al.
patent: 6356991 (2002-03-01), Bauman et al.
Intel® 21050 PCI-to-PCI Bridge Evaluation Board User's Guide, Sep. 1998, © Intel Corporation 1998, pp. i-iv, 1-1-3-2.
PCI Local Bus Specification, Revision 2.2, Dec. 1998, ©1992, 1993, 1995, 1998 PCI Special Interest Group, pp. i-ii, 201-204.
Tom Shanley and Don Anderson, PCI System Architecture, Third Edition, ©1995 MindShare, Inc., Chapter 19:PCI-to-PCI Bridge, pp. 381-455.
PCI Local Bus, PCI to PCI Bridge Architecture Specification, Revision 1.0, Apr. 1994, pp. i-iii, 1-66.
PCI Local Bus, PCI-to-PCI Bridge Architecture Specification, Revision 1.1, Dec. 1998, ©1994, 1998, PCI Special Interest Group, pp. 1-2, 11-13, 46-47, 57-66, 69-70.
PCI Local Bus, PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0, Sep. 1999, ©1999 PCI Special Interest Group, pp. 1-2, 34-37, 40-41, 93-95, 146-147.
Brinkmann, Jr. Hubert E.
Callison Ryan A.
Auve Glenn A.
Fletcher Yoder & Van Someren
Hewlett -Packard Development Company, L.P.
Vu Trisha
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