Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-10-31
2003-06-03
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C438S270000, C438S271000
Reexamination Certificate
active
06573562
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to electronics, in general, and to semiconductor components and methods of operation, in particular.
BACKGROUND OF THE INVENTION
Different types of semiconductor components are often used in automotive and other high voltage applications. These different types of semiconductor components include discrete devices and integrated circuits. As an example, the discrete devices can be power Metal-Oxide-Semiconductor (MOS) transistors having source, gate, and drain terminals. These different types of semiconductor components have been combined onto a single semiconductor chip to reduce the cost and space required for the semiconductor components.
One significant problem of these combined semiconductor components occurs when the drain terminal of the power MOS transistor is forward biased. The forward biasing of the drain terminal injects minority carriers into the semiconductor substrate, and the minority carriers degrade the performance of the integrated circuit or circuits located on the same semiconductor chip.
Several prior attempts have been made to either contain the injected minority carriers or suppress the injection of minority carriers. These prior attempts, however, still have disadvantages of low drain-to-source breakdown voltage, large epitaxial semiconductor layer thickness, and/or non-isolated power transistors.
Accordingly, a need exists for a semiconductor component with a power transistor combined with an integrated circuit onto a single semiconductor chip where the power transistor has a high drain-to-source breakdown voltage and is isolated from the integrated circuit. A need also exists for the epitaxial semiconductor layer, in which the power device and the integrated circuit are formed, to have a small thickness. A further need exists for a method of operating a semiconductor component to suppress the injection of minority carriers into the semiconductor substrate.
REFERENCES:
patent: 6413806 (2002-07-01), Sicard et al.
“Self-aligned and shielded-resurf LDMOS for dense 20V power IC's,” Ludikhuze et al., 1999 IEEE, pp. 81-84.
“SOA improvement by a double resurf LDMOS technique in a power IC technology,” Parthasarathy et al., 2000 IEEE, pp. 4.2.1-4.2.4.
“Multi-ring active analog protection for minority carrier injection suppression in smart power technology,” Gonnard et al., Proceedings of 2001 international symposium on power semiconductor devices & IC's, Osaka, pp. 351-354.
“DC substrate coupling between LDMOS and CMOS devices in hyperintegration I technology,” Venkatesan et al., 1998 IEEE, pp. 57-60.
“Multi-voltage device integration technique for 0.5 u m BICMOS & DMOS process,” Terashima et al., 2000 IEEE, pp. 331-334.
“Supression of a substrate injection by resurf LDMOS devices in a smart power technology for 20-30v applications,” Parthasarathy et al., 1998 IEEE, pp. 184-186.
Bose Amitava
Khemka Vishnu K.
Parthasarathy Vijay
Zhu Ronghua
Crane Sara
Im Junghwa
Motorola Inc.
LandOfFree
Semiconductor component and method of operation does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor component and method of operation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor component and method of operation will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3118305