Method for forming compact LCD packages and devices formed...

Liquid crystal cells – elements and systems – Particular structure – Having significant detail of cell structure only

Reexamination Certificate

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C349S151000, C349S152000

Reexamination Certificate

active

06556268

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to a method for forming an LCD package and device formed and more particularly, relates to a method for forming a compact LCD package that requires a substantially smaller planar area on the LCD for making connections to a driver chip and an external circuit and device formed.
BACKGROUND OF THE INVENTION
In recent years, liquid crystal display (LCD) panels have been used widely in place of cathode ray tubes (CRT) in electronic display applications. The LCD panel is first assembled together by filling a liquid crystal material in between a LCD substrate and a transparent glass cover plate. The LCD substrate consists of a multiplicity of switching, or electronic turn-on and turn-off devices for operating the multiplicity of pixels formed on the LCD panel.
After the assembly of a LCD panel is completed, the panel must be connected to an outside circuit for receiving electronic signals such that images may be produced in the panel. The electronic connections to the LCD panel can be provided by different techniques. A conventional technique for providing electronic signals to a LCD panel is by using a flexible printed circuit board (FPCB) which contains various electronic components welded thereto for providing signals to the LCD. The flexible printed circuit board is frequently manufactured of a conductive copper layer sandwiched between two flexible polyimide cover layers. The flexibility of FPCB is advantageous in the installation of a LCD panel.
FIG. 1A
is a graph illustrating a conventional design of LCD panel
10
connected by a FPCB
12
to a printed circuit board (PCB)
14
which has a surface mount technology (SMT) type IC chip
16
mounted on top.
In another conventional technique for bonding a LCD to a PCB, as shown in
FIG. 1B
, a tape automated bonding (TAB) technique is used. In the TAB bonding technique, a TAB section
20
is used to connect LCD
10
and PCB
14
. The TAB section
20
consists of a TAB tape
22
which has an IC chip
16
connected to it through bonding sites
24
. The TAB bonding technique provides the benefit of a compact package so that circuit density can be improved resulting in a lead pitch as low as 60 &mgr;m. The TAB, also known as TCP (tape carrier package) utilizes finely patterned thin metal, i.e., copper foil plated with Au or Sn, in place of wires and connects the metal tips metallurgically to corresponding gold plated bumps that are formed on the aluminum pads on the chip. TAB is preferred in smaller-pitch interconnects for high I/O ULSI devices because it enables smaller pitch and longer span bondings than those available by wire bonding. However, the TAB bonding technique is normally conducted at a higher fabrication cost.
In still another technique for bonding a LCD to a PCB, as shown in FIG. IC, a chip on glass (COG) technique is used. In the COG technique, an IC chip
16
is mounted directly on a LCD
10
by utilizing solder bumps
24
and an anisotropic conductive film (ACF)
26
. Detailed cross-sectional views of an ACF
26
is shown in
FIGS. 2A and 2B
. As shown in
FIG. 2A
, a TAB tape
22
which has conductive pads
28
formed on top is positioned over an ACF tape
30
which contains electrically conductive particles
32
embedded an insulative compound
34
. Positioned under the ACF
30
is a LCD substrate
10
which has conductive elements
36
formed on top. After the TAB tape
22
, the ACF
30
and the LCD substrate
10
are pressed together under heat, as shown in
FIG. 2B
, the conductive particles
32
provides electrical communication between the conductive pads
28
and the conductive elements
36
and therefore allowing the TAB tape
22
to electrically communicate with the LCD substrate
10
. It should be noted that, electrical communication between the conductive pads
28
and the conductive elements
26
is only established where the conductive particles
32
are compressed, i.e., only established anisotropically and selectively. The conductive elements
36
on the LCD substrate
10
is normally formed of indium-tin-oxide (ITO) thin films.
As shown in
FIG. 1C
, the COG technique may further connect the LCD substrate
10
to a printed circuit board (not shown) by a flexible printed circuit board (not shown). The COG technique therefore relies on bonding with solder bumps
24
formed on an IC chip and the ACF for electrical communications.
Each of the three conventional techniques for forming a TFT-LCD assembly has its benefits and disadvantages. For instance, in the first technique of using SMT/FPCB, the circuit density can be increased to achieve a compact package at the expense of using difficult TAB technology and high material costs. In the TAB and COG method, a rework of the assembly such as the removal of a defective IC from a LCD substrate is extremely difficult, if not impossible. For instance, the only possible means for removing an IC chip that is bonded to a LCD substrate is by using a shear force for pushing an IC chip and breaking its bond with the LCD substrate. This is a difficult process and frequently results in the destruction of the entire assembly.
In the present fabrication process for TFT-LCD assemblies, the SMT/FPCB method is frequently used in fabricating lower priced assemblies such as those utilizing small LCD panels. In large LCD panel applications, i.e., such as those used in notebook computers, the TAB bonding method is normally used. The COG method, due to its difficulty in reworking and repair, is also limited to small LCD panel display applications. The TAB process and the COG process are therefore the two major assembling methods used for TFT-LCD assemblies. To sum up, the TAB method can be easily reworked and repaired by removing an IC chip from the TAB tape and furthermore, it is compact in size which allows the achievement of high density packages of up to 60 &mgr;m pitch. However, the TAB process requires complicated fabrication steps which include IC bonding, tape fabrication, inner lead bonding, encapsulation, outer lead bonding and the ACF process. Another drawback for the TAB process is, during the ACF processing, there is a thermal expansion problem which may lead to misalignment between the leads. The TAB tape may further absorb moisture and contribute to its dimensional instability. Elaborate equipment may also be required for the TAB process and therefore increasing its fabrication costs.
In the COG process, while the fabrication steps required are simpler, i.e., only IC bumping and ACF processes are required, and furthermore, there is no thermal expansion problem and smaller pitch such as 50 &mgr;m can be achieved, the fabrication of an LCD package of compact size is nevertheless difficult. This difficulty is illustrated in
FIGS. 3A and 3B
. In
FIG. 3A
, a cross-sectional view of an LCD package
40
which consists of an LCD substrate shown as a lower glass panel
10
, an upper glass panel
42
, an IC chip (or a driver chip)
16
, an anisotropic conductive film (ACF) layer
26
, and a printed circuit board (or a flexible printed circuit board)
14
is shown. The driver chip
16
is equipped with a multiplicity of solder bumps
44
formed on an active surface of the chip
16
for making electrical connection with a second multiplicity of conductive leads
46
(such as ITO leads) formed on the top surface
48
of the lower glass panel
10
. The electrical communication is established by using the anisotropic conductive film layer
26
which is loaded with electrically conductive particles
50
. In order to communicate with the outside circuits, such as circuits on the PCB
14
, electrical communication through a third multiplicity of conductive pads
52
is provided between the PCB
14
and the lower glass panel
10
. A plane view of the LCD package
40
is further shown in FIG.
3
B.
As shown in
FIGS. 3A and 3B
, the lower glass panel
10
of the LCD package
40
is normally provided with a larger area than the upper glass panel
42
and thus leaving an exposed edge area
60
necessary for mounting of t

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