Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-01-15
2003-11-18
Nguyen, Tuan H. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S310000
Reexamination Certificate
active
06649957
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to semiconductor devices and processes, and more particularly to devices comprising a polycrystalline memory material, such as a perovskite, or ferroelectric, thin film.
Polycrystalline thin films are used in several known memory devices, such as ferroelectric memory devices and other perovskite memory devices. The memory device could be a Metal/Ferroelectric/Metal (MFM) capacitor, a gate stack of Metal/Ferroelectric/Insulator/Semiconductor (MFIS) for single transistor memory or Metal/Ferroelectric/Metal/Insulator/Semiconductor (MFMIS) gate stack memory transistor. A two terminal memory can also be fabricated with polycrystalline memory materials, such as, colossal magneto-resistive (CMR) materials, and high temperature super-conducting (HTSC) materials. Some of these memory structures have been demonstrated and studied extensively over the past ten years producing a memory cell with many outstanding characteristics. However, large arrays of these memory structures have not been successfully fabricated due to the presence of leaky memory cells. Even the presence of a few leaky memory cells can so significantly reduce functionality and yield as to impair the technical and economic viability of these materials in large memory arrays.
This leakage is due in part to the polycrystalline form of the materials used. In order for the ferroelectric materials to have good ferroelectric properties, the materials are preferably in crystalline form, including polycrystalline form. Other, memory materials may also need to be in crystalline, or polycrystalline, form to produce the desired properties.
SUMMARY OF THE INVENTION
A polycrystalline memory structure is described for improving reliability and yield of devices employing polycrystalline memory materials comprising a polycrystalline memory layer, which has crystal grain boundaries forming gaps between adjacent crystallites overlying a substrate. An insulating material is located at least partially within the gaps to at least partially block the entrance to the gaps, so the amount of subsequently deposited metal entering the gaps is reduced, or eliminated.
A method of forming a polycrystalline memory structure is also described. A layer of material is deposited and annealed to form a polycrystalline memory material having gaps between adjacent crystallites. An insulating material is deposited over the polycrystalline memory material to at least partially fill the gaps, thereby blocking a portion of each gap.
REFERENCES:
patent: 5854499 (1998-12-01), Nishioka
patent: 6143597 (2000-11-01), Matsuda et al.
patent: 2001/0018132 (2001-08-01), Hartner et al.
Hsu Sheng Teng
Li Tingkai
Zhang Fengyan
Zhuang Wei-Wei
Krieger Scott C.
Nguyen Tuan H.
Rabdau Matthew D.
Ripma David C.
Sharp Laboratories of America Inc.
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