Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-12-13
2003-06-17
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S059000, C257S072000, C257S365000, C257S366000, C257S331000
Reexamination Certificate
active
06580129
ABSTRACT:
This invention relates to a thin-film transistor (called TFT below) and its manufacturing method. More specifically, it relates to structural technology for improving the transistor property of TFTs.
The various kinds of devices which use TFTs include an active matrix substrate for a liquid-crystal display which is formed on a transparent substrate such as one made of glass and roughly the central domain is made to be the screen display domain
81
as shown in
FIG. 5
(A). In this screen display domain
81
, pixels are formed with data lines
90
and scan lines
91
made of metal film such as aluminum, tantalum, molybdenum, titanium, and tungsten, silicide film, and conductive semiconductor film. On each pixel, a liquid-crystal unit
94
(liquid-crystal cell) is formed where image signals are input via a TFT
30
for image switching. For the data line
90
, a data-side driving circuit
60
is constructed that is equipped with a shift register
84
, a level shifter
85
, a video line
87
, and an analog switch
86
. A scan-side driving circuit
70
equipped with a shift register
88
and a level shifter
89
are constructed for the scan line
91
. On each pixel, a retention capacitor
40
is formed connected to a capacity line
92
running in parallel with the scan line
91
, and this retention capacitor
40
has a function of increasing the charge retention property of the liquid-crystal unit
94
. This retention capacitor
40
may be formed between a scan line
91
of the previous row and a pixel electrode.
As shown in FIG.
5
(B), a CMOS circuit is constructed in the data-side and scan-side driving circuits
60
and
70
, with an N-type TPT
10
and a P-type TFT
20
. This kind of CMOS circuit forms an inverter circuit etc. in the driving circuits
60
and
70
with one row, two rows or more.
Therefore, in an active-matrix substrate
200
, on the front side of the substrate, three kinds of TFTs are formed consisting of an N-type TFT
10
for the driving circuit, a P-type TFT
20
for the driving circuit, and an N-type TFT
30
for image switching. Here, these TFTs
10
,
20
, and
30
have a common basic structure and manufacturing method. Therefore, to avoid duplication of explanation, the structure and manufacturing method of the N-type TFT
10
for the driving circuit are explained with reference to
FIG. 6
,
FIG. 7
, and FIG.
8
.
As shown in FIG.
6
(A), in an active-matrix substrate, an insulating matrix protection film
301
is formed on the surface of a transparent substrate
30
as the base body, and a polycrystalline semiconductor film
10
a
(semiconductor film) is formed on the surface of this matrix protection film
301
such as polysilicon of a thickness of 50 nm for example for forming the TFT
10
. On the surface of the semiconductor film
10
a,
a gate insulation film
13
is formed with a film thickness of 100 nm for example, and on the surface of this gate insulation film
13
, a gate electrode
19
is formed. Out of the semiconductor film
10
a,
the domain facing the gate electrode
19
across the gate insulation film
13
is a channel domain
15
with a channel length of 5 &mgr;m for example. On one side of this channel domain
15
, a source domain is formed that is equipped with a low-concentration source domain
161
and a high-concentration source domain
162
, and on the other side, a drain domain
17
is formed that is equipped with a low-concentration drain domain
171
and a high-concentration drain domain
172
. On the front side of thus-constructed TFT
10
, an interlayer insulation film
18
is formed, and a source electrode
12
formed on this interlayer insulation film
18
is electrically connected to the high-concentration source domain
162
via a contact hole
18
a
formed on the interlayer insulation film
18
. Also, a drain electrode
14
is formed on the surface of the interlayer insulation film
18
, and this drain electrode
14
is electrically connected to the high-concentration drain domain
172
via a contact hole
18
b
formed on the interlayer insulation film
18
.
In order to manufacture thus-constructed TFT
10
, as shown in FIG.
7
(A), firstly a matrix protection film
301
is formed on the surface of an insulation substrate
30
, and then on the entire surface of this matrix protection film, a semiconductor film
100
is formed that is made of polysilicon film of thickness 50 nm for example.
Next, a resist mask RM
11
is formed on the surface of the semiconductor film
100
using the photolithography technology.
Next, a semiconductor film
1
is patterned via the resist mask RM
11
, and as shown in FIG.
7
(B), an island-shape semiconductor film
10
a
(active layer) is formed.
Next, as shown in FIG.
7
(C), on the surface of the semiconductor film
10
a,
the gate insulation film
13
is formed and is made of a silicon oxidization film with a thickness of 100 nm for example.
Next, as shown in FIG.
7
(D), on the entire surface of the insulation substrate
30
, a tantalum film
910
is formed which is for forming a gate electrode etc., and additionally a resist mask RM
12
is formed using the photolithography technology.
Next, the tantalum film
910
is patterned via the resist mask RM
12
, and as shown in FIG.
7
(E), a gate electrode
19
is formed of a dimension of 5 &mgr;m in the channel-length direction.
Next, as shown in FIG.
7
(F), low-concentration impurity ions (phosphorus ions) are implanted with a dose of 0.1×10
13
/cm
2
to 10×10
13
/cm
2
with the gate electrode
19
as a mask, forming a low-concentration source domain
161
and a low-concentration drain domain
171
self-aligned to the gate electrode. Here, the part where the impurity ions were not introduced because it was located right beneath the gate electrode remains as a semiconductor film and becomes a channel domain
15
of a channel length of 5 &mgr;m.
Next, as shown in FIG.
8
(A), a resist mask RM
13
is formed that is wider at one side closer to the gate electrode, and high-concentration impurity ions (phosphorus ions) are implanted with a dose of 0.1×10
15
/cm
2
to 10×10
15
/cm
2
, forming a high-concentration source domain
162
and drain domain
172
. In this way, as shown in FIG.
8
(B), a source domain
16
is formed that is equipped with the low-concentration source domain
161
and the high-concentration source domain
162
, and a drain domain
17
is also formed that is equipped with the low-concentration drain domain
171
and the high-concentration drain domain
172
.
Next, as shown in FIG.
8
(C), an interlayer insulation film
18
is formed, and then on the interlayer insulation film
18
on the front side of the gate electrode
19
, and a resist mask RM
14
is formed using the photolithography technology for forming a contact hole.
Next, the interlayer insulation film
18
is etched via the resist mask RM
14
, and as shown in FIG.
8
(D), contact holes
18
a
and
18
b
are respectively formed on the parts of the interlayer insulation film
18
corresponding to the high-concentration source domain
162
and the high-concentration drain domain
172
.
Next, as shown in FIG.
8
(E), an aluminum film
900
is formed on the front side of the interlayer insulation film
18
by the sputtering method etc. for constructing a source electrode etc., and additionally a resist mask RM
15
is formed using the photolithography technology.
Next, the aluminum
900
is etched via a resist mask RM
15
, and as shown in FIG.
6
(A), a source electrode
12
is formed that is made of an aluminum film electrically connected to the high-concentration source domain
162
via the contact hole
18
a,
and a drain electrode
14
is formed that is electrically connected to the high-concentration drain domain
172
via the contact hole
18
b.
Among such manufacturing processes, in the manufacturing process shown in FIG.
8
(A), if the resist mask RM
13
is formed more widely only on the side where the drain domain
17
should be formed, as shown in FIG.
6
(B), a TFT
10
can be manufactured where the low-concentration drain domain
1
Lui Basil
Migliorato Piero
Miyasaka Mitsutoshi
Yudasaka Ichio
Flynn Nathan J.
Oliff & Berridg,e PLC
Sefer Ahmed N.
Seiko Epson Corporation
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