Method for fabricating an open can-type stacked capacitor on...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S303000, C257S306000, C257S308000, C257S309000, C438S244000, C438S387000, C438S396000

Reexamination Certificate

active

06580112

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates generally to electronic devices, and more particularly to a method for fabricating an open can-type stacked capacitor on an uneven surface.
BACKGROUND OF THE INVENTION
Modern electronic equipment such as televisions, telephones, radios and computers are generally constructed of solid state devices. Solid state devices are preferred in electronic equipment because they are extremely small and relatively inexpensive. Additionally, solid state devices are very reliable because they have no moving parts, but are based on the movement of charge carriers.
Solid state devices may be transistors, capacitors, resistors and other semiconductor devices. Typically, such devices are fabricated on a substrate and interconnected to form memory arrays, logic structures, timers and other integrated circuits. One type of memory array is a dynamic random access memory (DRAM) in which memory cells retain information only temporarily and are refreshed at periodic intervals. Despite this limitation, DRAMs are widely used because they provide low cost per bit of memory, high device density and feasibility of use.
In a DRAM, each memory cell typically includes an access transistor coupled to a storage capacitor. In order to fabricate high density DRAMs, the storage capacitors must take up less planar area in the memory cells. As storage capacitors are scaled down in dimensions, a sufficiently high storage capacity must be maintained. Efforts to maintain storage capacity have concentrated on building three-dimensional capacitor structures that increase the capacitor surface area. The increased surface area provides for increased storage capacity. Three-dimensional capacitor structures include trench capacitors and stacked capacitors.
For stacked capacitors, the storage node generally extends significantly above the surface of an underlying substrate in order to provide a large surface area and thus sufficient storage capacity. This leads to topological problems in the formation of subsequent layers of the DRAM. Such topological problems are reduced by the use of open can-type stacked capacitors that use annular electrodes to increase surface area of the storage node while minimizing height. However, open can-type stacked capacitors have needed a planarized surface on which to be formed, which limits the applications in which they can be used and adds cost to the fabrication process.
SUMMARY OF THE INVENTION
In accordance with the present invention, an improved open can-type stacked capacitor and method are provided that substantially eliminate or reduce disadvantages and problems associated with previously developed systems and methods. In particular, the present invention provides a method for fabricating an open can-type stacked capacitor on a substantially uneven surface, such as an insulator with protruding bit lines.
In one embodiment of the present invention, a method for fabricating an open can-type stacked capacitor includes forming a conductive layer outwardly of a substantially uneven surface. A step is formed in an outer surface of the conductive layer. A base of a first electrode is formed by removing a predetermined thickness of at least part of the conductive layer. The base comprises a portion of the conductive layer underlying the step by the predetermined distance. A sidewall of the first electrode is formed. A dielectric layer is formed outwardly of the first electrode. A second electrode of the capacitor is formed outwardly of the dielectric layer.
More specifically, in accordance with a particular embodiment of the present invention, the substantially uneven surface includes first and second bit lines of a dynamic random access memory (DRAM). The first and second bit lines extend from an insulator and are spaced apart from each other by a trough. The step is formed over the trough such that the base of the first electrode is disposed in the trough. The sidewall of the first electrode is coupled to the base in the trough and extends outwardly of the trough and the first and second bit lines.
Technical advantages of the present invention include providing an improved method for forming an open can-type stacked capacitor. In particular, an open can-type stacked capacitor is formed on an uneven surface, such as on and between bit lines extending from an insulator. As a result, planarization of an underlying surface can be omitted and the cost of manufacturing the capacitor is reduced.
Another technical advantage of the present invention includes an improved method for forming a DRAM. Still, another technical advantage is the elimination of extended wet etching processes used for planarization. Accordingly, particle generation associated with wet etching is minimized.
Other technical advantages will be readily apparent to one skilled in the art from the following figures, descriptions, and claims.


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patent: 5604147 (1997-02-01), Fischer et al.
patent: 6018172 (2000-01-01), Hidaka et al.
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patent: 6303956 (2001-10-01), Sandhu et al.

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