Semiconductor wafer singulation method

Details Semiconductor wafer singulation method Semiconductor wafer singulation method

2002-01-03

2003-07-22

Dang, Phuc T. (Department: 2818)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S463000

Reexamination Certificate

active

06596562

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method whereby a semiconductor wafer is singulated into individual dies.
2. Discussion of Related Art
Integrated circuits are usually formed in and on silicon and other semiconductor wafer substrates. One substrate typically carries an array of integrated circuits. Each integrated circuit may include millions of electronic semiconductor components, such as transistors, capacitors, diodes, etc. The integrated circuits further include alternating metal lines and dielectric layers formed on the silicon substrate. The metal lines interconnect the electronic components with one another, and provide communication between the electronic components and terminals on the layers. The dielectric layers isolate the metal lines electrically from one another.
A wafer which is processed to include such integrated circuits is subsequently “singulated” or “diced” into individual dies, each die carrying a respective one of the integrated circuits. A saw is typically used to cut in x- and y-directions through scribe streets between the integrated circuits.
The layers of the integrated circuits overlap the scribe street, so that the saw has to be directed through the layers. Previously, the layers were made of mechanically strong dielectric materials such as SiO
2
and fluorinated silica glass. These materials were sufficiently strong to prevent cracking into the integrated circuits when being sawed. More recently, the dielectric layers have been made of low K-value (low electric permitivity) dielectric materials. These low K-value dielectric materials are much weaker, and cracks propagate easily from the saw through these materials into the integrated circuits.


REFERENCES:
patent: 5637862 (1997-06-01), Paolella
patent: 6168311 (2001-01-01), Xiao et al.
patent: 6399463 (2002-06-01), Glenn et al.
U.S. patent application Ser. No. 09/997,086, Mulligan et al., Not Yet Published.

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