Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-03-30
2003-09-23
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S680000, C438S687000, C438S635000
Reexamination Certificate
active
06624071
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a method for fabricating a pattern of a thin film on a substrate. An example of the thin film is a functional thin film that delivers a predetermined function in various electronic devices, such as a display device and a semiconductor device, more particularly, a metal thin film can be the equivalent to a wiring pattern of the various electronic devices. The invention can also be applied to form a metal thin film pattern for noble metal ornaments other than the electronic devices. The invention also relates to a microstructure equipped with this thin film pattern.
2. Description of Related Art
Traditionally, a wiring board has been fabricated by a method for screen-printing a substrate with a metal paste or by forming a metal film pattern on the substrate by photolithography. As an example of forming a metal thin film on the substrate, International Publication WO96/07487, for example, proposes a method (proposal
1
) in which a thiol-based coupling agent layer is deposited on a substrate to form a metal (gold) thin film on the substrate through the thiol-based coupling agent layer (utilizing the bonding of a thiol group to a gold).
Additionally, as a technique different from the typical metal thin film or metal thin film pattern forming as set forth, Japanese Patent Laid-Open No. 309918/1996 and Japanese Patent Laid-Open No. 74273/1997 disclose a method (proposal
2
) that uses the thiol-based coupling agent in order to improve adhesion of a copper foil to a substrate in a copper foil circuit board. Japanese Patent Laid-Open No. 204350/1998 proposes a method (proposal
3
) for fabricating a wiring pattern where a gold fine particle covered with a thiol-based molecule is discharged by an ink jet method for patterning.
These proposals have had problems. For example, the proposal
1
has no consideration for forming a metal pattern on the substrate; the proposal
2
requires a manipulation of resist coating to etching in order to form a pattern such as a circuit; and the proposal
3
does not have sufficient adhesion of a metal to the substrate thereunder. That is, the traditionally proposed methods for fabricating the thin film pattern, particularly the metal pattern could not obtain a pattern by a simple method, which provides high adhesion of the substrate side to a thin film and uses no complex resist coating to etching process.
SUMMARY OF THE INVENTION
In order to solve the problems as set forth, this invention provides a patterning method capable of forming a thin film pattern on a substrate with high adhesion. Additionally, a purpose of the invention is to provide a patterning method capable of forming a metal thin film pattern on a substrate with high adhesion.
Furthermore, a purpose of the present invention is to provide a structure having a thin film pattern provided on a substrate. The thin film pattern has been obtained by patterning as set forth. Besides, a purpose of the invention is to provide a method for forming a thin film pattern on a substrate having excellent adhesion of the substrate to a metal film, for example, by way of no resist coating to etching process.
The invention can include forming a pattern made of an organic molecule film on a substrate, supplying a solution for forming a thin film onto the organic molecule film pattern and selectively forming the thin film on the organic molecule film pattern.
REFERENCES:
patent: 5635105 (1997-06-01), Kawata et al.
patent: 5776254 (1998-07-01), Yuuki et al.
patent: 5907008 (1999-05-01), Nakano et al.
patent: 5953634 (1999-09-01), Kajita et al.
patent: 6191054 (2001-02-01), Ohtsuka et al.
patent: 6312526 (2001-11-01), Yamamuka et al.
patent: 8-309918 (1996-11-01), None
patent: 9-74273 (1997-03-01), None
patent: 10-204350 (1998-08-01), None
patent: WO 96/07487 (1996-03-01), None
Lebentritt Michael S.
Oliff & Berridg,e PLC
Seiko Epson Corporation
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