Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-03-14
2003-03-11
Thomas, Tom (Department: 2811)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06532572
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to design tools for integrated circuits. More specifically, but without limitation thereto, the present invention relates to a method for estimating the number of transit connections that may be routed through a hardmac of an integrated circuit.
Integrated circuits typically include blocks or partitions of multiple circuit elements called hard macros or “hardmacs”. Each hardmac is a generally rectangular cell that may be a complex hierarchical module containing several smaller modules. Connections made between hardmacs that pass through an intervening hardmac are called transit connections. The number of available transit connections, i.e., the total number of connections of a hardmac minus those connections used internally by the hardmac is termed the porosity of the hardmac. The porosity of each hardmac in an integrated circuit chip design is useful information for logic design tools in designing routable floorplans. Disadvantageously, porosity information is generally not available from hardmac cell libraries, and is generally costly to generate.
SUMMARY OF THE INVENTION
The present invention advantageously addresses the problems above as well as other problems by providing a method of estimating the number of available transit connections, or porosity, of a hardmac for a logic design routing tool.
In one embodiment, the present invention may be characterized as a method of estimating horizontal and vertical porosity of a hardmac that includes the steps of (a) calculating a total metal layer capacity of the hardmac, (b) calculating an absolute porosity of the hardmac from the total metal layer capacity and an internal connection density, and (c) calculating a relative porosity of the hardmac from the total metal layer capacity and the absolute porosity.
In another embodiment, the present invention may be characterized as a computer program product for estimating the porosity of a hardmac that includes a medium for embodying a computer program for input to a computer and a computer program embodied in the medium for causing the computer to perform the following functions:
(a) calculating a total horizontal metal layer capacity of a hardmac;
(b) calculating an absolute horizontal porosity of the hardmac from the total horizontal metal layer capacity and a horizontal internal connection density;
(c) calculating a relative horizontal porosity of the hardmac from the total horizontal metal layer capacity and the absolute horizontal porosity;
(d) calculating a total vertical metal layer capacity of the hardmac;
(e) calculating an absolute vertical porosity of the hardmac from the total vertical metal layer capacity and a vertical internal connection density; and
(f) calculating a relative vertical porosity of the hardmac from the total vertical metal layer capacity and the absolute vertical porosity.
REFERENCES:
patent: 5835378 (1998-11-01), Scepanovic et al.
Fitch Even Tabin & Flannery
LSI Logic Corporation
Thomas Tom
Tran Thien F
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