Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2001-05-14
2003-01-07
Ho, Hoai (Department: 2818)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S129000, C365S158000
Reexamination Certificate
active
06504779
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to devices for data storage and retrieval. Particularly, this invention relates to a resistive cross point memory (RXPtM) cell array, one example of which is a magnetic random access memory (MRAM), and to circuitry for sensing a resistive state of a memory cell in the array so as to sense a stored data value from the memory cell. It is conceivable that other forms of RXPtM's will be developed that are not based on MRAM use, and the methods described in this invention disclosure will apply to those also. More particularly, this invention relates to a method and apparatus for testing for acceptable calibration of a sense amplifier which is utilized in sensing the resistance value of a memory cell and sensing a stored data value from a memory cell, and for initiating recalibration of the sense amplifier, when needed, all without destroying data stored in the memory cell.
2. Related Technology
Magnetic Random Access Memory (“MRAM”) is a non-volatile memory that is being considered for long term data storage. A typical MRAM device includes an array of memory cells. Word lines extend along rows of the memory cells, and bit lines extend along columns of the memory cells. The memory cells are each located at a cross point of a word line and a bit line, and each memory cell includes two masses of magnetic material. One of the masses is magnetically fixed and the other is magnetically variable. A memory cell stores a bit of information as the orientation of relative magnetization of the fixed and variable materials. In other words, the magnetization of each memory cell at any given time assumes one of two stable orientations. These two stable orientations, referred to as “parallel” and “anti-parallel” magnetic orientation, represent logic values of ‘0’ and ‘1,’ for example. The resistance of a memory cell varies dependent upon whether it stores a “0” or a “1” value. That is, the resistance of a memory cell is a first value “R” if the orientation of the magnetization of the fixed magnetic material and of the variable magnetic material is parallel, and the resistance of the memory cell is increased to a second value R+&Dgr;R if the orientation of the magnetization is anti-parallel. The orientation of the relative magnetization of a selected memory cell (and, therefore, the logic state of the memory cell) may be sensed by sensing the resistance value of the selected memory cell.
Performing sense and write operations in MRAM devices could be orders of magnitude faster than performing sense and write operations in conventional long term storage devices, such as hard drives, for example. In addition, the MRAM devices could be more compact and could consume less power than hard drives and other such conventional long term data storage devices.
However, sensing the resistance state of a single memory cell in an array (and thereby “sensing” the data value) can be unreliable. All memory cells in the array are coupled together through many parallel paths (i.e., the bit and word lines). The resistance seen at one cross point equals the resistance of the memory cell at that cross point in parallel with resistances of memory cells in the other rows and columns (again, the array of memory cells may be characterized as a cross point resistor network).
There is a need to reliably sense the resistance states of memory cells in MRAM devices.
Currently, it is known to use a sense amplifier to sense a resistance value associated with a selected memory cell of an array. However, determining when the sense amplifier has an acceptable calibration or needs to be recalibrated is conventionally performed off of the chip on which the array of memory cells is fabricated. Further, conventional methods of determining when a new sense amplifier recalibration is required and performing that recalibration, destroys data in a memory cell. In essence, calibration of such an sense amplifier is a laboratory procedure.
Further, calibration of a sense amplifier so that it can reliably perform this sense operation compensates at the same time for two aspects of the RXPtM array. These two aspects may be considered as “global” and “environmental.” That is, the sense amplifier is compensated or calibrated for global factors of the memory cell array that are constant over time. These global factors include such influences as process and geometry variations (i.e., asymmetries in the circuit design and fabrication non-uniformity resulting in threshold voltage variations and resistance and capacitance variations, for example) that occur during fabrication of the memory cell array. At the same time, the environmental factors then existing for the RXPtM array are compensated for. However, compensation for the global factors which are constant over time does not address needed compensations for environmental parameters which change over time. These environmental parameters include such factors as operating temperature of the RXPtM array, and power supply voltage variations.
Thus, there is a need to provide a method and apparatus to determine when recalibration of sense amplifier offset (i.e., calibration) values is necessary for reliably sensing stored data values in a RXPtM.
Further, there is a need for providing of such a method and apparatus to determine when recalibration of a sense amplifier is needed before data is lost because of an amplifier “out of calibration” condition.
Also, there is a need for such a sense amplifier recalibration to be performed without loss of data stored in a RXPtM array.
Still further, there is a need to have such a method and apparatus implemented on the same chip as the RXPtM cell array.
SUMMARY OF THE INVENTION
These needs are met by the present invention. According to one aspect of the present invention, a sense amplifier is employed to sense the resistance state of a set of RXPtM cells, and a digital value of “0” or “1” for each memory element of the set is determined by comparing individual cell sense data to an average data value using a multiple sense method. The sense method uses a “time value.” By “time value” is meant that the resistance value of an individual RXPtM cell is determined by a current-to-time conversion when an operating voltage is applied to the RXPtM cell with a sense amplifier.
The “average time value” (ATV) for the set of RXPtM cells is determined, and a pair of test limit values (respectively referred to as “shorts” and “opens” values are set at preferred time values of ¼ATV, and 4ATV, for example. It will be understood that other values of the “shorts” and “opens” test limit values may be utilized. However, and importantly, any memory cell of the set which has an individual time value less than or equal to the “shorts” value, or greater than or equal to the “opens” value is labeled as inoperative, and is not utilized in determining when a recalibration of the sense amplifier is necessary. That is, a shorted memory cell or an open-circuit memory cell is not included in the set of memory cells which is utilized to determine the need for recalibration of the sense amplifiers.
Further, an additional pair of recalibration high/recalibration low (Recal Hi/Lo) limit values are determined. These Recal Hi/Lo values may preferably be determined as ½ATV and 2ATV, for example. Again, it is to be understood that other values for the Recal Hi/Lo values might be selected. However, the pair of Recal Hi/Lo values lie between the “shorts” and “opens” values, as will be understood from the explanation above.
Then, for each memory cell of the array in which data is stored, and contemporaneously with an initial “sense” operation of that memory cell, a sense amplifier is employed to sense the resistance value of the memory cell. If a “shorts” or “opens” condition is detected, then the recalibration test result is ignored. That is, a shorted or open-circuited memory cell will not trigger a recalibration. However, if a “shorts” or “opens” condition is not detected, then the results of the te
Hewlett--Packard Company
Ho Hoai
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