Methods of forming thin film transistors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S156000, C438S585000

Reexamination Certificate

active

06589821

ABSTRACT:

TECHNICAL FIELD
This invention relates specifically to thin film transistor technology.
BACKGROUND OF THE INVENTION
As circuit density continues to increase, there is a corresponding drive to produce smaller and smaller field effect transistors. Field effect transistors have typically been formed by providing active areas within a bulk substrate material or within a complementary conductivity type well formed within a bulk substrate. One additional technique finding greater application in achieving reduced transistor size is to form field effect transistors with thin films, which is commonly referred to as “thin film transistor” (TFT) technology. These transistors are formed using thin layers which constitute all or a part of the resultant source and drain regions, as opposed to providing both regions within a bulk semiconductor substrate.
Specifically, typical prior art TFT's are formed from a thin film of semiconductive material (typically polysilicon). A central channel region of the thin film is masked by a separate layer, while opposing adjacent source/drain regions are doped with an appropriate p or n type conductivity enhancing impurity. A gate insulator and gate are provided either above or below the thin film channel region, thus providing a field effect transistor having active and channel regions formed within a thin film as opposed to a bulk substrate.
It would be desirable to improve upon methods of forming thin film transistors and in improving thin film transistor constructions.


REFERENCES:
patent: 4243997 (1981-01-01), Natori et al.
patent: 4467518 (1984-08-01), Bansal et al.
patent: 4845537 (1989-07-01), Nishimura
patent: 4864374 (1989-09-01), Banerjee
patent: 5001540 (1991-03-01), Ishihara
patent: 5156987 (1992-10-01), Sandhu
patent: 5208172 (1993-05-01), Fitch et al.
patent: 5214295 (1993-05-01), Manning
patent: 5229310 (1993-07-01), Sivan
patent: 5270968 (1993-12-01), Kim
patent: 5274259 (1993-12-01), Grabowski et al.
patent: 5283455 (1994-02-01), Inoue
patent: 5334862 (1994-08-01), Manning
patent: 5418393 (1995-05-01), Hayden
patent: 5432370 (1995-07-01), Kitamura et al.
patent: 5444275 (1995-08-01), Kugishima et al.
patent: 5463240 (1995-10-01), Watanabe
patent: 5508531 (1996-04-01), Ha
patent: 5561308 (1996-10-01), Kamata et al.
patent: 5612546 (1997-03-01), Choi et al.
patent: 5640034 (1997-06-01), Malhi
patent: 5700727 (1997-12-01), Manning
patent: 5747359 (1998-05-01), Yuan et al.
patent: 5925894 (1999-07-01), Yang
patent: 5930615 (1999-07-01), Manning
patent: 6074954 (2000-06-01), Lill et al.
patent: 6175134 (2001-01-01), Manning
J.D. Hayden et al., “A New Toroidal TFT Structure for Future Generation SRAMs,” IEEE, 1993, pp. 825-828.
IBM Technical Disclosure Bulletin, “Methods of Forming Small Contact Holes”, Jan. 1998, vol. 30, No. 8, pp. 252-253.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods of forming thin film transistors does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods of forming thin film transistors, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of forming thin film transistors will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3041574

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.