Semiconductor device with voltage sustaining zone

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S345000, C257S489000

Reexamination Certificate

active

06624472

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to a semiconductor device with a voltage-sustaining zone.
It is well known in the semiconductor art that the spread of the depletion region of a reverse-biased rectifying junction (and so breakdown voltage of that junction) can be increased by reducing the dopant concentration and increasing the size of a semiconductor region associated with the rectifying junction. However, although this enables the reverse breakdown voltage to be increased, it also increases the resistivity and length of the current path through the device when the rectifying junction is forward biased in the ON condition of the device. This means that the series resistivity of the current path for majority charge carriers through the device increases in proportion to approximately the square of the desired reverse breakdown voltage, so limiting the current handling capability of the device for a given maximum thermal dissipation.
U.S. Pat. No. 4,754,310 (our reference PHB32740) addresses this problem by providing one of the regions forming the rectifying junction as a zone formed of first regions of one conductivity type interposed with second regions of the opposite conductivity type with the dopant concentrations and dimensions of the first and second regions being such that, when the rectifying junction is reversed biased in operation and the zone is depleted of free charge carriers, the space charge per unit area in the first and second regions balances at least to the extent that the electric field resulting from the space charge is less than the critical field strength at which avalanche breakdown would occur. This enables the required reverse breakdown voltage characteristics to be obtained using interposed semiconductor regions which individually have a higher dopant concentration, and thus lower resistivity, than would otherwise be required so that the series resistivity of the first and second regions and thus the on-resistance of a device such as a MOSFET can be lower than for conventional devices.
SUMMARY OF THE INVENTION
It is an aim of the present invention to provide another way of improving the trade off between breakdown voltage and on-resistance in vertical high voltage semiconductor devices where the word “vertical” should be understood to mean that the main current flow path through the device is between first and second main opposed surfaces of the device.
According to one aspect of the present invention there is provided a vertical semiconductor device wherein a voltage sustaining zone adjoining a rectifying junction has regions of one conductivity type interposed with regions of the opposite conductivity type with the dimensions and dopant concentrations of the interposed regions being such that, when the interposed regions are depleted of free charge carriers, the space charge per unit area of the third and fourth regions substantially balance, a plurality of field shaping regions being dispersed within the voltage sustaining zone, each field shaping region providing a resistive path extending from the rectifying junction through the voltage sustaining zone so that when the rectifying junction is reverse-biased in operation a leakage current flows along the resistive paths to modify the electric field gradient within the voltage-sustaining zone.
According to an aspect of the present invention, there is provided a semiconductor device as set out in claim 1.
The present invention thus provides a semiconductor device wherein the resistive paths enable a linear potential gradient to be achieved within a voltage sustaining zone so that any imbalance between the interposed regions forming the voltage sustaining zone is compensated for so relaxing the tolerances on formation of the interposed regions of the voltage sustaining zones.
Other advantageous technical features in accordance with the present invention are set out in the appended dependent claims.


REFERENCES:
patent: 4754310 (1988-06-01), Coe
patent: 5164804 (1992-11-01), Terashima
patent: 6201279 (2001-03-01), Pfirsch
patent: 2089118 (1982-06-01), None
patent: 0068998 (2000-11-01), None
“Characteristics of Shallow Boron-Doped Layers in Si by Rapid Vapor-Phase Direct Doping”, by Y. Kiyota et al., J. Electrochem Soc. vol. 140, No. 4, Apr. 1993.

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