Write prohibiting control circuit for a semiconductor device

Details Write prohibiting control circuit for a semiconductor device Write prohibiting control circuit for a semiconductor device

2001-11-09

2003-03-04

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S190000, C365S230090

Reexamination Certificate

active

06529425

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory device inputted with multiple bits of input data.
2. Description of the Related Art
Conventionally, there has been provided a semiconductor memory device inputted with multiple bits of input data.
Even in such a multiple bits product, in an application field of Fail memory (memory for storing fail address detected in a memory tester) or an applied product for image processing, there has been request of intending to execute rewriting operation of data for respective bits of input data of multiple bits.
Meanwhile, there is provided a multiple bits product having a function for prohibiting a total of data inputted by being controlled by data writing signals or the like, from writing the data.
However, in order to rewrite portions of bits of input data of multiple bits, there is needed operation of temporarily reading a total of data stored to memory cells of corresponding addresses, inputting the total of data to registers, rewriting data of bits intended to rewrite and writing the total of data again.
Although there is provided the conventional multiple bits products having the function of prohibiting a total of input data from being written in this way, it cannot be selected whether data is written with regard to an arbitrary data direction (“0” data or “1” data) at respective bits.
The invention has been carried out in view of the above-described problem and it is an object thereof to be capable of selecting whether data is written in an arbitrary data direction for respective bits in a multiple bits products.
BRIEF SUMMARY OF THE INVENTION
A semiconductor memory device according to a first aspect of the present invention comprises a plurality of memory cells for storing data, a plurality of input data control circuits for receiving input data of multiple bits, and a plurality of write control circuits for prohibiting data from being written to corresponding ones of the memory cells at respective bits of the input data when the respective bits of the input data is predetermined data.
A semiconductor memory device according to a second aspect of the present invention comprises plurality of memory cells for storing data, a plurality of bit line pairs connected to the memory cells, a plurality of input data control circuits for receiving input data of multiple bits, a plurality of selecting circuits each for selecting the bit line pairs, the selecting circuits are provided in correspondence with the bit line pairs, and a plurality of selection control circuits for controlling selection
on-selection of the selecting circuits, each of the selection control circuits is provided in correspondence with each of the selecting circuits, wherein each of the selection control circuits determines corresponding one of the selecting circuits as non-selection when a corresponding bit of the input data is predetermined data.


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patent: 10199248 (1998-07-01), None

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